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/* ... */
#include "main.h"
/* ... */
Includes
static void SystemClock_Config(void);
static uint32_t SRAM1_Read_Write(void);
Private function prototypes
/* ... */
int main(void)
{
/* ... */
HAL_Init();
SystemClock_Config();
BSP_LED_Init(LED1);
BSP_LED_Init(LED2);
if (SRAM1_Read_Write())
{
BSP_LED_On(LED1);
}if (SRAM1_Read_Write()) { ... }
else
{
BSP_LED_On(LED2);
}else { ... }
while (1)
{
}while (1) { ... }
}{ ... }
/* ... */
#if defined ( __ICCARM__ )
#pragma location = ".sram2"
#elif defined (__CC_ARM)
#pragma arm section code = ".sram2"
#elif defined(__GNUC__)
__attribute__((section(".sram2")))
#endif
static uint32_t SRAM1_Read_Write(void)
{
uint32_t DATA_SIZE=32768;
uint32_t SRAM1_Base=0x20020000;
int i= 0;
for( i=0; i < DATA_SIZE ; i++)
{
*(__IO uint32_t *)(SRAM1_Base + (i*4)) = 0xffffffff ;
}for (i=0; i < DATA_SIZE ; i++) { ... }
for( i=0; i < DATA_SIZE ; i++)
{
*(__IO uint32_t *)(SRAM1_Base + (i*4)) = 0xaaaa5555 ;
}for (i=0; i < DATA_SIZE ; i++) { ... }
for(i=0; i < DATA_SIZE ; i++)
{
if ( *(__IO uint32_t *)(SRAM1_Base + (i*4)) != 0xaaaa5555 )
{
return 0 ;
}if (*(__IO uint32_t *)(SRAM1_Base + (i*4)) != 0xaaaa5555) { ... }
}for (i=0; i < DATA_SIZE ; i++) { ... }
return 1;
}{ ... }
/* ... */
static void SystemClock_Config(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
HAL_StatusTypeDef ret = HAL_OK;
__HAL_RCC_PWR_CLK_ENABLE();
/* ... */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 8;
RCC_OscInitStruct.PLL.PLLN = 200;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
RCC_OscInitStruct.PLL.PLLR = 2;
ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
if(ret != HAL_OK)
{
while(1) { ; }
}if (ret != HAL_OK) { ... }
/* ... */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
if(ret != HAL_OK)
{
while(1) { ; }
}if (ret != HAL_OK) { ... }
}{ ... }
#ifdef USE_FULL_ASSERT
/* ... */
void assert_failed(uint8_t *file, uint32_t line)
{
/* ... */
while (1)
{
}while (1) { ... }
}assert_failed (uint8_t *file, uint32_t line) { ... }
/* ... */#endif
/* ... */
/* ... */