HAL + 0/1140 examples
SourceVu will show references to HAL_RCC_ClockConfig() from the following samples and libraries:
Examples
STM32F4-Discovery
Examples
ADC
DAC
DMA
FLASH
GPIO
HAL
I2C
PWR
RCC
SPI
SPI_FullDuplex_AdvComIT
SPI_FullDuplex_AdvComPolling
TIM
UART
Applications
Audio
EEPROM
FatFs
STM32F401-Discovery
Examples
ADC
DMA
FLASH
GPIO
HAL
I2C
PWR
RCC
SPI
TIM
UART
Applications
Audio
EEPROM
FatFs
STM32F411E-Discovery
Examples
ADC
DMA
FLASH
GPIO
HAL
I2C
PWR
RCC
SPI
TIM
UART
Applications
Audio
EEPROM
FatFs
STM32F411RE-Nucleo
Applications
EEPROM
Examples
GPIO
HAL
PWR
RCC
RTC
TIM
UART
Examples_MIX
CRC
DMA
I2C
PWR
SPI
TIM
UART
STM32F412ZG-Nucleo
Examples
ADC
Cortex
CRC
DMA
FLASH
GPIO
HAL
I2C
IWDG
PWR
RCC
RNG
RTC
SPI
TIM
UART
WWDG
Applications
EEPROM
FatFs
USB_Device
USB_Host
STM32F413ZH-Nucleo
Examples
ADC
Cortex
CRC
DMA
FLASH
GPIO
HAL
I2C
IWDG
PWR
RCC
RNG
RTC
SPI
SRAM
TIM
UART
WWDG
Applications
EEPROM
FatFs
FreeRTOS
USB_Device
USB_Host
STM32F429ZI-Nucleo
Examples
ADC
Cortex
CRC
DMA
FLASH
GPIO
HAL
IWDG
PWR
RCC
RTC
TIM
UART
WWDG
Applications
EEPROM
FatFs
FileX
LwIP
NetXDuo
ThreadX
USBX
USB_Device
USB_Host
Examples_MIX
ADC
DMA2D
STM32F446ZE-Nucleo
Examples
ADC
Cortex
CRC
DMA
FLASH
GPIO
HAL
IWDG
PWR
RCC
RTC
TIM
UART
WWDG
Applications
EEPROM
FatFs
USB_Device
USB_Host
STM32446E_EVAL
Demonstrations
Examples
ADC
CAN
CEC
Cortex
CRC
DAC
DCMI
DMA
FLASH
FMC
GPIO
HAL
I2C
IWDG
PWR
QSPI
RCC
RTC
SAI
TIM
UART
WWDG
Applications
Audio
Camera
EEPROM
FatFs
FreeRTOS
IAP
LibJPEG
STemWin
USB_Device
USB_Host
STM32469I-Discovery
Demonstrations
Examples
ADC
DAC
DMA
DMA2D
FLASH
FMC
GPIO
HAL
I2C
IWDG
LCD_DSI
PWR
QSPI
RCC
SPI
TIM
UART
WWDG
Applications
Audio
Display
EEPROM
FatFs
FileX
FX_IAP
FreeRTOS
LibJPEG
STemWin
ThreadX
USBX
USB_Device
USB_Host
STM32469I_EVAL
Demonstrations
Examples
ADC
CAN
Cortex
CRC
CRYP
DAC
DCMI
DMA
DMA2D
FLASH
FMC
GPIO
HAL
HASH
I2C
IWDG
LCD_DSI
PWR
QSPI
RCC
RNG
RTC
SAI
TIM
UART
WWDG
Applications
Audio
Camera
Display
EEPROM
FatFs
FreeRTOS
IAP
LibJPEG
LwIP
mbedTLS
STemWin
USB_Device
USB_Host
STM324x9I_EVAL
Examples
ADC
CAN
Cortex
CRC
CRYP
DAC
DCMI
DMA
DMA2D
FLASH
FMC
GPIO
HAL
HASH
IWDG
LTDC
PWR
RCC
RNG
RTC
SAI
TIM
UART
WWDG
Applications
Audio
Camera
Display
EEPROM
FatFs
FreeRTOS
IAP
LibJPEG
LwIP
mbedTLS
STemWin
USB_Device
USB_Host
Demonstrations
STemWin
STM324xG_EVAL
Demonstrations
Examples
ADC
CAN
Cortex
CRC
CRYP
DAC
DCMI
DMA
FLASH
FSMC
GPIO
HAL
HASH
I2S
IWDG
PWR
RCC
RNG
RTC
SMARTCARD
TIM
UART
WWDG
Applications
Camera
Display
EEPROM
FatFs
FreeRTOS
IAP
LibJPEG
LwIP
mbedTLS
STemWin
USB_Device
USB_Host
STM32F412G-Discovery
Demonstrations
Examples
ADC
Cortex
CRC
DFSDM
DMA
FLASH
GPIO
HAL
I2C
I2S
IWDG
PWR
QSPI
RCC
RNG
RTC
SPI
TIM
UART
WWDG
Applications
Display
EEPROM
FatFs
FreeRTOS
LibJPEG
STemWin
USB_Device
USB_Host
STM32F413H-Discovery
Demonstrations
Examples
ADC
Cortex
CRC
DAC
DFSDM
DMA
FLASH
FMC
GPIO
HAL
QSPI
RCC
RNG
RTC
TIM
UART
Applications
Display
FatFs
FreeRTOS
LibJPEG
STemWin
USB_Device
USB_Host
STM32F429I-Discovery
Demonstrations
Examples
ADC
DAC
DMA
DMA2D
FLASH
FMC
GPIO
HAL
I2C
LTDC
PWR
RCC
SPI
TIM
UART
Applications
Display
EEPROM
FatFs
FreeRTOS
LibJPEG
STemWin
USB_Host
STM32446E-Nucleo
Applications
EEPROM
Examples
GPIO
HAL
I2C
PWR
RCC
RTC
TIM
UART
STM32F401RE-Nucleo
Applications
EEPROM
Examples
GPIO
HAL
PWR
TIM
UART
STM32F410xx-Nucleo
Applications
EEPROM
Examples
GPIO
HAL
I2C
PWR
RCC
RTC
TIM
UART
 
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SummarySyntaxArgumentsRelatedReferences

Return value

None

Notes

The SystemCoreClock CMSIS variable is used to store System Clock Frequency and updated by HAL_RCC_GetHCLKFreq() function called within this function The HSI is used (enabled by hardware) as system clock source after startup from Reset, wake-up from STOP and STANDBY mode, or in case of failure of the HSE used directly or indirectly as system clock (if the Clock Security System CSS is enabled). A switch from one clock source to another occurs only if the target clock source is ready (clock stable after startup delay or PLL locked). If a clock source which is not yet ready is selected, the switch will occur when the clock source will be ready. Depending on the device voltage range, the software has to set correctly HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency (for more details refer to section above "Initialization/de-initialization functions")

References

from examples