pointer to an RCC_OscInitTypeDef structure that contains the configuration information for the RCC Oscillators.
Return value
HAL status
Notes
The PLL is not disabled when used as system clock. Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not supported by this API. User should request a transition to LSE Off first and then LSE On or LSE Bypass. Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not supported by this API. User should request a transition to HSE Off first and then HSE On or HSE Bypass. This function add the PLL/PLLR factor management during PLL configuration this feature is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices