PLL Source and PLLM Divider can be written only when PLL, PLLI2S and PLLSAI(*) are disabled PLLN/PLLQ can be written only when PLL is disabled This can be selected for USB, RNG, SDIO PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_48M\n PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_48M\n PLLCFGR PLLQ LL_RCC_PLL_ConfigDomain_48M
Examples
LL_RCC_PLL_ConfigDomain_48M() is referenced by 2 libraries and example projects: