HAL
__LL_RCC_CALC_PLLCLK_FREQ
is only used within HAL.
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STM32 Libraries and Samples
HAL
__LL_RCC_CALC_PLLCLK_FREQ
__LL_RCC_CALC_PLLCLK_FREQ macro
Helper macro to calculate the PLLCLK frequency on system domain (*) value not defined in all devices.
Syntax
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Summary
Declaration
from
stm32f4xx_ll_rcc.h:1574
#define
__LL_RCC_CALC_PLLCLK_FREQ
(
__INPUTFREQ__
,
__PLLM__
,
__PLLN__
,
__PLLP__
)
(
(
__INPUTFREQ__
)
/
(
__PLLM__
)
*
(
__PLLN__
)
/
\
(
(
(
(
__PLLP__
)
>
>
RCC_PLLCFGR_PLLP_Pos
)
+
1U
)
*
2U
)
)
Arguments
Argument
Description
__INPUTFREQ__
PLL Input frequency (based on HSE/HSI)
__PLLM__
This parameter can be one of the following values: @arg
LL_RCC_PLLM_DIV_2
@arg
LL_RCC_PLLM_DIV_3
@arg
LL_RCC_PLLM_DIV_4
@arg
LL_RCC_PLLM_DIV_5
@arg
LL_RCC_PLLM_DIV_6
@arg
LL_RCC_PLLM_DIV_7
@arg
LL_RCC_PLLM_DIV_8
@arg
LL_RCC_PLLM_DIV_9
@arg
LL_RCC_PLLM_DIV_10
@arg
LL_RCC_PLLM_DIV_11
@arg
LL_RCC_PLLM_DIV_12
@arg
LL_RCC_PLLM_DIV_13
@arg
LL_RCC_PLLM_DIV_14
@arg
LL_RCC_PLLM_DIV_15
@arg
LL_RCC_PLLM_DIV_16
@arg
LL_RCC_PLLM_DIV_17
@arg
LL_RCC_PLLM_DIV_18
@arg
LL_RCC_PLLM_DIV_19
@arg
LL_RCC_PLLM_DIV_20
@arg
LL_RCC_PLLM_DIV_21
@arg
LL_RCC_PLLM_DIV_22
@arg
LL_RCC_PLLM_DIV_23
@arg
LL_RCC_PLLM_DIV_24
@arg
LL_RCC_PLLM_DIV_25
@arg
LL_RCC_PLLM_DIV_26
@arg
LL_RCC_PLLM_DIV_27
@arg
LL_RCC_PLLM_DIV_28
@arg
LL_RCC_PLLM_DIV_29
@arg
LL_RCC_PLLM_DIV_30
@arg
LL_RCC_PLLM_DIV_31
@arg
LL_RCC_PLLM_DIV_32
@arg
LL_RCC_PLLM_DIV_33
@arg
LL_RCC_PLLM_DIV_34
@arg
LL_RCC_PLLM_DIV_35
@arg
LL_RCC_PLLM_DIV_36
@arg
LL_RCC_PLLM_DIV_37
@arg
LL_RCC_PLLM_DIV_38
@arg
LL_RCC_PLLM_DIV_39
@arg
LL_RCC_PLLM_DIV_40
@arg
LL_RCC_PLLM_DIV_41
@arg
LL_RCC_PLLM_DIV_42
@arg
LL_RCC_PLLM_DIV_43
@arg
LL_RCC_PLLM_DIV_44
@arg
LL_RCC_PLLM_DIV_45
@arg
LL_RCC_PLLM_DIV_46
@arg
LL_RCC_PLLM_DIV_47
@arg
LL_RCC_PLLM_DIV_48
@arg
LL_RCC_PLLM_DIV_49
@arg
LL_RCC_PLLM_DIV_50
@arg
LL_RCC_PLLM_DIV_51
@arg
LL_RCC_PLLM_DIV_52
@arg
LL_RCC_PLLM_DIV_53
@arg
LL_RCC_PLLM_DIV_54
@arg
LL_RCC_PLLM_DIV_55
@arg
LL_RCC_PLLM_DIV_56
@arg
LL_RCC_PLLM_DIV_57
@arg
LL_RCC_PLLM_DIV_58
@arg
LL_RCC_PLLM_DIV_59
@arg
LL_RCC_PLLM_DIV_60
@arg
LL_RCC_PLLM_DIV_61
@arg
LL_RCC_PLLM_DIV_62
@arg
LL_RCC_PLLM_DIV_63
__PLLN__
Between 50/192(*) and 432
__PLLP__
This parameter can be one of the following values: @arg
LL_RCC_PLLP_DIV_2
@arg
LL_RCC_PLLP_DIV_4
@arg
LL_RCC_PLLP_DIV_6
@arg
LL_RCC_PLLP_DIV_8
Return value
PLL clock frequency (in Hz)
Notes
ex:
__LL_RCC_CALC_PLLCLK_FREQ
(HSE_VALUE,LL_RCC_PLL_GetDivider (), LL_RCC_PLL_GetN (), LL_RCC_PLL_GetP ());
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