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SourceVuESP-IDF Framework and ExamplesESP-IDFi2c_context

i2c_context variable

Syntax

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Summary

Declaration

static i2c_context_t i2c_context[I2C_NUM_MAX] = { I2C_CONTEX_INIT_DEF(I2C_NUM_0), #if SOC_HP_I2C_NUM > 1 I2C_CONTEX_INIT_DEF(I2C_NUM_1), #endif };

References

Code

Location

Referrer

static i2c_context_t i2c_context[I2C_NUM_MAX] = {

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_hw_disable()

if (i2c_context[i2c_num].hw_enabled != false) {

i2c_hw_disable()

i2c_context[i2c_num].hw_enabled = false;

i2c_hw_disable()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_hw_disable()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_hw_enable()

if (i2c_context[i2c_num].hw_enabled != true) {

i2c_hw_enable()

i2c_context[i2c_num].hw_enabled = true;

i2c_hw_enable()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_hw_enable()

i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);

i2c_driver_install()

i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_driver_install()

i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_driver_install()

i2c_ll_slave_enable_rx_it(i2c_context[i2c_num].hal.dev);

i2c_driver_install()

i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_driver_delete()

i2c_hal_deinit(&i2c_context[i2c_num].hal);

i2c_driver_delete()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_reset_tx_fifo()

i2c_ll_txfifo_rst(i2c_context[i2c_num].hal.dev);

i2c_reset_tx_fifo()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_reset_tx_fifo()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_reset_rx_fifo()

i2c_ll_rxfifo_rst(i2c_context[i2c_num].hal.dev);

i2c_reset_rx_fifo()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_reset_rx_fifo()

i2c_ll_get_intr_mask(i2c_context[i2c_num].hal.dev, &int_mask);

i2c_isr_handler_default()

i2c_hal_master_handle_tx_event(&(i2c_context[i2c_num].hal), &evt_type);

i2c_isr_handler_default()

i2c_hal_master_handle_rx_event(&(i2c_context[i2c_num].hal), &evt_type);

i2c_isr_handler_default()

i2c_ll_slave_get_event(i2c_context[i2c_num].hal.dev, &evt_type);

i2c_isr_handler_default()

i2c_ll_get_rxfifo_cnt(i2c_context[i2c_num].hal.dev, &rx_fifo_cnt);

i2c_isr_handler_default()

i2c_ll_read_rxfifo(i2c_context[i2c_num].hal.dev, p_i2c->data_buf, rx_fifo_cnt);

i2c_isr_handler_default()

i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, int_mask);

i2c_isr_handler_default()

i2c_ll_get_txfifo_len(i2c_context[i2c_num].hal.dev, &tx_fifo_rem);

i2c_isr_handler_default()

i2c_ll_write_txfifo(i2c_context[i2c_num].hal.dev, data, size);

i2c_isr_handler_default()

i2c_ll_slave_disable_tx_it(i2c_context[i2c_num].hal.dev);

i2c_isr_handler_default()

i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, int_mask);

i2c_isr_handler_default()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_data_mode()

i2c_ll_set_data_mode(i2c_context[i2c_num].hal.dev, tx_trans_mode, rx_trans_mode);

i2c_set_data_mode()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_set_data_mode()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_data_mode()

i2c_ll_get_data_mode(i2c_context[i2c_num].hal.dev, tx_trans_mode, rx_trans_mode);

i2c_get_data_mode()

int scl_io = i2c_context[i2c_num].scl_io_num;

i2c_master_clear_bus()

int sda_io = i2c_context[i2c_num].sda_io_num;

i2c_master_clear_bus()

i2c_hal_get_timing_config(&i2c_context[i2c_num].hal, &timing_config);

i2c_hw_fsm_reset()

i2c_ll_master_get_filter(i2c_context[i2c_num].hal.dev, &filter_cfg);

i2c_hw_fsm_reset()

i2c_hal_master_init(&(i2c_context[i2c_num].hal));

i2c_hw_fsm_reset()

i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_hw_fsm_reset()

i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_hw_fsm_reset()

i2c_hal_set_timing_config(&i2c_context[i2c_num].hal, &timing_config);

i2c_hw_fsm_reset()

i2c_ll_master_set_filter(i2c_context[i2c_num].hal.dev, filter_cfg);

i2c_hw_fsm_reset()

i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num);

i2c_param_config()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_param_config()

i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_param_config()

i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_param_config()

i2c_hal_slave_init(&(i2c_context[i2c_num].hal));

i2c_param_config()

i2c_ll_slave_enable_auto_start(i2c_context[i2c_num].hal.dev, true);

i2c_param_config()

i2c_ll_set_source_clk(i2c_context[i2c_num].hal.dev, src_clk);

i2c_param_config()

i2c_ll_set_slave_addr(i2c_context[i2c_num].hal.dev, i2c_conf->slave.slave_addr, i2c_conf->slave.addr_10bit_en);

i2c_param_config()

i2c_ll_set_rxfifo_full_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_FULL_THRESH_VAL);

i2c_param_config()

i2c_ll_set_txfifo_empty_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_EMPTY_THRESH_VAL);

i2c_param_config()

i2c_ll_set_sda_timing(i2c_context[i2c_num].hal.dev, I2C_SLAVE_SDA_SAMPLE_DEFAULT, I2C_SLAVE_SDA_HOLD_DEFAULT);

i2c_param_config()

i2c_ll_set_tout(i2c_context[i2c_num].hal.dev, I2C_SLAVE_TIMEOUT_DEFAULT);

i2c_param_config()

i2c_ll_slave_enable_rx_it(i2c_context[i2c_num].hal.dev);

i2c_param_config()

i2c_hal_master_init(&(i2c_context[i2c_num].hal));

i2c_param_config()

i2c_ll_master_set_filter(i2c_context[i2c_num].hal.dev, I2C_FILTER_CYC_NUM_DEF);

i2c_param_config()

i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk, s_get_src_clk_freq(src_clk));

i2c_param_config()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_param_config()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_param_config()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_period()

i2c_ll_set_scl_timing(i2c_context[i2c_num].hal.dev, high_period, low_period);

i2c_set_period()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_set_period()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_period()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_period()

i2c_ll_get_scl_timing(i2c_context[i2c_num].hal.dev, high_period, low_period);

i2c_get_period()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_period()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_filter_enable()

i2c_ll_master_set_filter(i2c_context[i2c_num].hal.dev, cyc_num);

i2c_filter_enable()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_filter_enable()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_filter_enable()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_filter_disable()

i2c_ll_master_set_filter(i2c_context[i2c_num].hal.dev, 0);

i2c_filter_disable()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_filter_disable()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_filter_disable()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_start_timing()

i2c_ll_master_set_start_timing(i2c_context[i2c_num].hal.dev, setup_time, hold_time);

i2c_set_start_timing()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_set_start_timing()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_start_timing()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_start_timing()

i2c_ll_get_start_timing(i2c_context[i2c_num].hal.dev, setup_time, hold_time);

i2c_get_start_timing()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_start_timing()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_stop_timing()

i2c_ll_master_set_stop_timing(i2c_context[i2c_num].hal.dev, setup_time, hold_time);

i2c_set_stop_timing()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_set_stop_timing()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_stop_timing()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_stop_timing()

i2c_ll_get_stop_timing(i2c_context[i2c_num].hal.dev, setup_time, hold_time);

i2c_get_stop_timing()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_stop_timing()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_data_timing()

i2c_ll_set_sda_timing(i2c_context[i2c_num].hal.dev, sample_time, hold_time);

i2c_set_data_timing()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_set_data_timing()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_data_timing()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_data_timing()

i2c_ll_get_sda_timing(i2c_context[i2c_num].hal.dev, sample_time, hold_time);

i2c_get_data_timing()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_get_data_timing()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_timeout()

i2c_ll_set_tout(i2c_context[i2c_num].hal.dev, timeout);

i2c_set_timeout()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_set_timeout()

i2c_ll_get_tout(i2c_context[i2c_num].hal.dev, timeout);

i2c_get_timeout()

i2c_context[i2c_num].scl_io_num = scl_io_num;

i2c_context[i2c_num].sda_io_num = sda_io_num;

i2c_ll_read_rxfifo(i2c_context[i2c_num].hal.dev, cmd->data + cmd->bytes_used, p_i2c->rx_cnt);

i2c_master_cmd_begin_static()

i2c_ll_write_txfifo(i2c_context[i2c_num].hal.dev, write_pr, fifo_fill);

i2c_master_cmd_begin_static()

i2c_ll_master_write_cmd_reg(i2c_context[i2c_num].hal.dev, hw_cmd, p_i2c->cmd_idx);

i2c_master_cmd_begin_static()

i2c_ll_master_write_cmd_reg(i2c_context[i2c_num].hal.dev, hw_end_cmd, p_i2c->cmd_idx + 1);

i2c_master_cmd_begin_static()

i2c_ll_master_enable_tx_it(i2c_context[i2c_num].hal.dev);

i2c_master_cmd_begin_static()

i2c_ll_master_write_cmd_reg(i2c_context[i2c_num].hal.dev, hw_cmd, p_i2c->cmd_idx);

i2c_master_cmd_begin_static()

i2c_ll_master_write_cmd_reg(i2c_context[i2c_num].hal.dev, hw_end_cmd, p_i2c->cmd_idx + 1);

i2c_master_cmd_begin_static()

i2c_ll_master_enable_rx_it(i2c_context[i2c_num].hal.dev);

i2c_master_cmd_begin_static()

i2c_ll_master_write_cmd_reg(i2c_context[i2c_num].hal.dev, hw_cmd, p_i2c->cmd_idx);

i2c_master_cmd_begin_static()

i2c_ll_update(i2c_context[i2c_num].hal.dev);

i2c_master_cmd_begin_static()

i2c_ll_start_trans(i2c_context[i2c_num].hal.dev);

i2c_master_cmd_begin_static()

|| i2c_ll_is_bus_busy(i2c_context[i2c_num].hal.dev)) {

i2c_master_cmd_begin()

i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_master_cmd_begin()

i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK);

i2c_master_cmd_begin()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_slave_write_buffer()

i2c_ll_slave_enable_tx_it(i2c_context[i2c_num].hal.dev);

i2c_slave_write_buffer()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_slave_write_buffer()

I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_slave_read_buffer()

i2c_ll_slave_enable_rx_it(i2c_context[i2c_num].hal.dev);

i2c_slave_read_buffer()

I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock));

i2c_slave_read_buffer()

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