Not all Espressif chips can support slave mode (e.g. ESP32C2) In master mode, if the cache is likely to be disabled(such as write flash) and the slave is time-sensitive, `ESP_INTR_FLAG_IRAM` is suggested to be used. In this case, please use the memory allocated from internal RAM in i2c read and write function, because we can not access the psram(if psram is enabled) in interrupt handle function when cache is disabled.
Examples
i2c_driver_install() is referenced by 8 libraries and example projects: