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SourceVuESP-IDF Framework and ExamplesESP-IDFadc_ll_set_sar_clk_div()

adc_ll_set_sar_clk_div() function

ADC SAR clock division factor setting. ADC SAR clock divided from `RTC_FAST_CLK`.

Syntax

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Summary

Declaration

from adc_ll.h:341

static inline void adc_ll_set_sar_clk_div(adc_unit_t adc_n, uint32_t div);

Arguments

Argument

Description

adc_n

div

Division factor.

References

Code

Location

Referrer

static inline void adc_ll_set_sar_clk_div(adc_unit_t adc_n, uint32_t div)

adc_ll.h:341

adc_ll_set_sar_clk_div(ADC_UNIT_1, ADC_LL_SAR_CLK_DIV_DEFAULT(ADC_UNIT_1));

adc_legacy.c:161

adc_rtc_chan_init()

adc_ll_set_sar_clk_div(ADC_UNIT_2, ADC_LL_SAR_CLK_DIV_DEFAULT(ADC_UNIT_2));

adc_legacy.c:170

adc_rtc_chan_init()

adc_ll_set_sar_clk_div(unit, ADC_LL_SAR_CLK_DIV_DEFAULT(unit));

adc_oneshot_hal.c:73

adc_oneshot_hal_setup()

Call Tree

adc_ll_set_sar_clk_div() is called by 2 functions:

adc_rtc_chan_init()

adc_oneshot_hal_setup()

adc_ll_set_sar_clk_div()

Data Use

adc_ll_set_sar_clk_div() reads 6 variables and writes 4 variables:

adc_unit_t::ADC_UNIT_1

sens_dev_s::::val

sens_dev_s::sar_read_ctrl

sens_dev_s::::val

sens_dev_s::sar_read_ctrl2

SENS

adc_ll_set_sar_clk_div()

sens_dev_s::::::sar1_clk_div

sens_dev_s::::val

sens_dev_s::::::sar2_clk_div

sens_dev_s::::val

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