Symbols
loading...
Files
loading...
SourceVuSTM32 Libraries and SamplesADC_SingleConversion_TriggerSW_IT

ADC_SingleConversion_TriggerSW_IT sample

ADC_SingleConversion_TriggerSW_IT is a sample project defining the following symbols:

Most used functions

Name
Location
Summary
This function handles NMI exception.
This function handles Hard Fault exception.
This function handles Debug Monitor exception.
This function handles Memory Manage exception.
This function handles Bus Fault exception.
This function handles Usage Fault exception.
This function handles SysTick Handler.
This function handles SVCall exception.
This function handles PendSVC exception.
Main program
This function handles external line 15_10 interrupt request.
This function handles DAC interrupt request.
This function handles ADCx interrupt request.
Configure ADC (ADC instance: ADCx) and GPIO used by ADC channels.
ADC group regular overrun interruption callback
This function is executed in case of error occurrence.
ADC group regular end of unitary conversion interruption callback
System Clock Configuration The system Clock is configured as follow : System Clock source = PLL (HSE) SYSCLK(Hz) = 180000000 HCLK(Hz) = 180000000 AHB Prescaler = 1 APB1 Prescaler = 4 APB2 Prescaler = 2 HSE Frequency(Hz) = 8000000 PLL_M = 8 PLL_N = 360 PLL_P = 2 PLL_Q = 7 VDD(V) = 3.3 Main regulator output voltage = Scale1 mode Flash Latency(WS) = 5
For this example, generate a waveform voltage on a spare DAC channel, so user has just to connect a wire between DAC channel (pin PA.04) and ADC channel (pin PA.04) to run this example. (this prevents the user from resorting to an external signal generator). This function configures the DAC and generates a constant voltage of Vdda/2.
For this example, generate a waveform voltage on a spare DAC channel, so user has just to connect a wire between DAC channel (pin PA.04) and ADC channel (pin PA.04) to run this example. (this prevents the user from resorting to an external signal generator). This function modifies the voltage level, to generate a waveform circular, shape of ramp: Voltage is increasing at each press on push button, from 0 to maximum range (Vdda) in 5 steps, then starting back from 0V. Voltage is updated incrementally at each call of this function.

Other commonly used symbols

Name
Location
Summary
Miscellaneous Configuration *********************** Vector Table base offset field. This value must be a multiple of 0x200.
@file Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/Inc/main.h @author MCD Application Team Header for main.c module @attention Copyright (c) 2017 STMicroelectronics. All rights reserved. This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.
@file Examples_MIX/ADC/ADC_SingleConversion_TriggerSW_IT/Inc/stm32f4xx_it.h @author MCD Application Team This file contains the headers of the interrupt handlers. @attention Copyright (c) 2017 STMicroelectronics. All rights reserved. This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.
tick interrupt priority
Time out for HSE start up, in ms
Time out for LSE start up, in ms
@file stm32f4xx_hal_conf.h @author MCD Application Team HAL configuration file. @attention Copyright (c) 2017 STMicroelectronics. All rights reserved. This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.
This is the list of modules to be used in the HAL driver
This is the HAL system configuration section Value of VDD in mv
Transceiver Basic Control Register
Auto-Negotiation process completed
PHY special control/ status register Offset
Transceiver Basic Status Register
PHY Speed mask
Enable auto-negotiation function
PHY Duplex mask
Select the power down mode
Valid link established
PHY Reset
Select loop-back mode
Set the full-duplex mode at 100 Mb/s
Set the half-duplex mode at 100 Mb/s
Set the full-duplex mode at 10 Mb/s
Set the half-duplex mode at 10 Mb/s
Restart auto-negotiation function
Isolate PHY from MII
Jabber condition detected
Uncomment the line below to expanse the "assert_param" macro in the HAL drivers code
PHY Interrupt Source Flag register Offset
PHY Link down inturrupt

Dependencies

ADC_SingleConversion_TriggerSW_IT depends on the following libraries: