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LL_USART_SetBaudRate() function
Configure USART BRR register for achieving expected Baud Rate value.
Syntax
__STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx,
uint32_t PeriphClk,
uint32_t OverSampling,
uint32_t BaudRate);
Arguments
Argument
Description
USARTx
USART Instance
PeriphClk
Peripheral Clock
OverSampling
This parameter can be one of the following values: @arg ![]()
LL_USART_OVERSAMPLING_16
@arg ![]()
LL_USART_OVERSAMPLING_8
BaudRate
Baud Rate
Return value
None
Notes
Compute and set USARTDIV value in BRR Register (full BRR content) according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values Peripheral clock and Baud rate values provided as function parameters should be valid (Baud rate value != 0)
Related Functions
Found 136 other functions taking a ![]()
USART_TypeDef
argument:
Function
Description
Write in Transmitter Data Register (Transmit Data value, 8 bits)
USART Enable
Configure simultaneously enabled/disabled states of Transmitter and Receiver CR1 TE LL_USART_SetTransferDirection
Configure Character frame format (Datawidth, Parity control, Stop Bits)
Check if the USART Read Data Register Not Empty Flag is set or not
Enable RX Not Empty Interrupt
Enable Error Interrupt
Check if the USART RX Not Empty Interrupt is enabled or disabled.
Read Receiver Data register (Receive Data value, 8 bits)
Check if the USART Transmission Complete Flag is set or not
Check if the USART Transmit Data Register Empty Flag is set or not
Check if the USART Noise error detected Flag is set or not
Check if the USART Error Interrupt is enabled or disabled.
Clear Transmission Complete Flag
Disable Transmission Complete Interrupt
Check if the USART TX Empty Interrupt is enabled or disabled.
Enable Transmission Complete Interrupt
Enable TX Empty Interrupt
Disable TX Empty Interrupt
Check if the USART Transmission Complete Interrupt is enabled or disabled.
Get the data register address used for DMA transfer
Set Oversampling to 8-bit or 16-bit mode
Indicate if USART is enabled
Configure HW Flow Control mode (both CTS and RTS)
Perform basic configuration of USART for enabling use in Synchronous Mode
Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
Enable DMA Mode for reception
Clear Noise detected Flag
Disable RX Not Empty Interrupt
Enable DMA Mode for transmission
Initialize USART registers according to the specified parameters in USART_InitStruct.
Disable Clock output on SCLK pin
Set the length of the stop bits
Clear OverRun Error Flag
De-initialize USART registers (Registers restored to their default values).
Initialize USART Clock related settings according to the specified parameters in the USART_ClockInitStruct.
USART Disable (all USART prescalers and outputs are disabled)
Return enabled/disabled states of Transmitter and Receiver CR1 TE LL_USART_GetTransferDirection
Configure Parity (enabled/disabled and parity mode if enabled).
Return Parity configuration (enabled/disabled and parity mode if enabled) CR1 PCE LL_USART_GetParity
Set Receiver Wake Up method from Mute mode.
Return Receiver Wake Up method from Mute mode
Set Word length (i.e. nb of data bits, excluding start and stop bits)
Return Word length (i.e. nb of data bits, excluding start and stop bits)
Return Oversampling mode
Configure if Clock pulse of the last data bit is output to the SCLK pin or not
Enable Clock output on SCLK pin
Indicate if Clock output on SCLK pin is enabled
Retrieve the length of the stop bits
Receiver Enable (Receiver is enabled and begins searching for a start bit)
Receiver Disable
Transmitter Enable
Transmitter Disable
Set Address of the USART node.
Return 4 bit Address of the USART node as set in ADD field of CR2.
Enable RTS HW Flow Control
Disable RTS HW Flow Control
Enable CTS HW Flow Control
Disable CTS HW Flow Control
Enable LIN mode
Disable LIN mode
Indicate if LIN mode is enabled
Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
Perform basic configuration of USART for enabling use in LIN Mode
Retrieve Clock pulse of the last data bit output configuration (Last bit Clock pulse output to the SCLK pin or not)
Select the phase of the clock output on the SCLK pin in synchronous mode
Return phase of the clock output on the SCLK pin in synchronous mode
Select the polarity of the clock output on the SCLK pin in synchronous mode
Return polarity of the clock output on the SCLK pin in synchronous mode
Return HW Flow Control configuration (both CTS and RTS)
Enable One bit sampling method
Disable One bit sampling method
Indicate if One bit sampling method is enabled
Return current Baud Rate value, according to USARTDIV present in BRR register (full BRR content), and to used Peripheral Clock and Oversampling mode values
Enable IrDA mode
Disable IrDA mode
Indicate if IrDA mode is enabled
Configure IrDA Power Mode (Normal or Low Power)
Retrieve IrDA Power Mode configuration (Normal or Low Power)
Set Irda prescaler value, used for dividing the USART clock source to achieve the Irda Low Power frequency (8 bits value)
Return Irda prescaler value, used for dividing the USART clock source to achieve the Irda Low Power frequency (8 bits value)
Enable Smartcard NACK transmission
Disable Smartcard NACK transmission
Indicate if Smartcard NACK transmission is enabled
Enable Smartcard mode
Disable Smartcard mode
Indicate if Smartcard mode is enabled
Set Smartcard prescaler value, used for dividing the USART clock source to provide the SMARTCARD Clock (5 bits value)
Return Smartcard prescaler value, used for dividing the USART clock source to provide the SMARTCARD Clock (5 bits value)
Set Smartcard Guard time value, expressed in nb of baud clocks periods (GT[7:0] bits : Guard time value)
Return Smartcard Guard time value, expressed in nb of baud clocks periods (GT[7:0] bits : Guard time value)
Enable Single Wire Half-Duplex mode
Disable Single Wire Half-Duplex mode
Indicate if Single Wire Half-Duplex mode is enabled
Set LIN Break Detection Length
Return LIN Break Detection Length
Perform basic configuration of USART for enabling use in Multi processor Mode (several USARTs connected in a network, one of the USARTs can be the master, its TX output connected to the RX inputs of the other slaves USARTs).
Check if the USART Parity Error Flag is set or not
Check if the USART Framing Error Flag is set or not
Check if the USART OverRun Error Flag is set or not
Check if the USART IDLE line detected Flag is set or not
Check if the USART Parity Error Interrupt is enabled or disabled.
Check if the USART LIN Break Detection Interrupt is enabled or disabled.
Check if the USART CTS Interrupt is enabled or disabled.
Check if the USART LIN Break Detection Flag is set or not
Check if the USART CTS Flag is set or not
Check if the USART Send Break Flag is set or not
Check if the USART Receive Wake Up from mute mode Flag is set or not
Perform basic configuration of USART for enabling use in Half Duplex Mode
Perform basic configuration of USART for enabling use in Smartcard Mode
Perform basic configuration of USART for enabling use in Irda Mode
Clear Parity Error Flag
Clear Framing Error Flag
Clear IDLE line detected Flag
Clear RX Not Empty Flag
Clear LIN Break Detection Flag
Clear CTS Interrupt Flag
Enable IDLE Interrupt
Enable Parity Error Interrupt
Enable LIN Break Detection Interrupt
Enable CTS Interrupt
Disable IDLE Interrupt
Disable Parity Error Interrupt
Disable LIN Break Detection Interrupt
Disable Error Interrupt
Disable CTS Interrupt
Check if the USART IDLE Interrupt source is enabled or disabled.
Disable DMA Mode for reception
Check if DMA Mode is enabled for reception
Disable DMA Mode for transmission
Check if DMA Mode is enabled for transmission
Read Receiver Data register (Receive Data value, 9 bits)
Write in Transmitter Data Register (Transmit Data value, 9 bits)
Request Break sending
Put USART in Mute mode
Put USART in Active mode