LL_DMA_ClearFlag_HT5() function

DMAx Instance

Disable DMA stream.

Set Number of data to transfer.

Enable Transfer error interrupt.

Enable DMA stream.

Configure the Source and Destination addresses.

Enable Transfer complete interrupt.

Configure all parameters linked to DMA transfer. CR CIRC LL_DMA_ConfigTransfer\n CR PINC LL_DMA_ConfigTransfer\n CR MINC LL_DMA_ConfigTransfer\n CR PSIZE LL_DMA_ConfigTransfer\n CR MSIZE LL_DMA_ConfigTransfer\n CR PL LL_DMA_ConfigTransfer\n CR PFCTRL LL_DMA_ConfigTransfer

Select Channel number associated to the Stream.

Get Data transfer direction (read from peripheral or from memory).

Get Stream 0 transfer complete flag.

Get Stream 0 transfer error flag.

Clear Stream 0 transfer error flag.

Clear Stream 0 transfer complete flag.

Get Stream 7 transfer error flag.

Get Stream 3 transfer complete flag.

Get Stream 3 transfer error flag.

Clear Stream 3 transfer complete flag.

Get Stream 2 transfer complete flag.

Get Stream 7 transfer complete flag.

Get Stream 2 transfer error flag.

Clear Stream 2 transfer complete flag.

Clear Stream 7 transfer complete flag.

Clear Stream 0 half transfer flag.

Get Stream 0 half transfer flag.

Get Stream 5 transfer complete flag.

Get Stream 5 transfer error flag.

Enable Half transfer interrupt.

Clear Stream 5 transfer complete flag.

Set the Memory address.

Clear Stream 7 transfer error flag.

Initialize the DMA registers according to the specified parameters in DMA_InitStruct.

De-initialize the DMA registers to their default reset values.

Set the Peripheral address.

Get Stream 1 transfer complete flag.

Get Stream 6 transfer complete flag.

Get Stream 1 transfer error flag.

Get Stream 6 transfer error flag.

Clear Stream 1 transfer complete flag.

Clear Stream 6 transfer complete flag.

Set Peripheral increment mode.

Set Data transfer direction (read from peripheral or from memory).

Set DMA mode normal, circular or peripheral flow control. CR PFCTRL LL_DMA_SetMode

Set Memory burst transfer configuration.

Set Stream priority level.

Set Memory increment mode.

Set Peripheral size.

Set Memory size.

Set Peripheral burst transfer configuration.

Configure the FIFO . FCR DMDIS LL_DMA_ConfigFifo

Get the Memory address.

Get the Peripheral address.

Set the Memory to Memory Source address.

Set the Memory to Memory Destination address.

Get the Memory to Memory Source address.

Get Stream 5 FIFO error flag.

Get Stream 6 FIFO error flag.

Get Stream 7 FIFO error flag.

Clear Stream 1 half transfer flag.

Clear Stream 2 half transfer flag.

Clear Stream 3 half transfer flag.

Clear Stream 4 half transfer flag.

Get Stream 0 direct mode error flag.

Get Stream 1 direct mode error flag.

Get Stream 2 direct mode error flag.

Get Stream 3 direct mode error flag.

Get Stream 4 direct mode error flag.

Get Stream 5 direct mode error flag.

Get Stream 2 half transfer flag.

Get Stream 3 half transfer flag.

Get Stream 4 half transfer flag.

Get Stream 5 half transfer flag.

Get Stream 6 half transfer flag.

Get Stream 7 half transfer flag.

Get the Memory to Memory Destination address.

Set Memory 1 address (used in case of Double buffer mode).

Get Memory 1 address (used in case of Double buffer mode).

Get Stream 1 half transfer flag.

Get Stream 4 transfer complete flag.

Get Stream 4 transfer error flag.

Get Stream 6 direct mode error flag.

Get Stream 7 direct mode error flag.

Get Stream 0 FIFO error flag.

Get Stream 1 FIFO error flag.

Get Stream 2 FIFO error flag.

Get Stream 3 FIFO error flag.

Get Stream 4 FIFO error flag.

Clear Stream 3 FIFO error flag.

Clear Stream 4 FIFO error flag.

Clear Stream 5 FIFO error flag.

Clear Stream 6 FIFO error flag.

Clear Stream 7 FIFO error flag.

Enable Direct mode error interrupt.

Enable FIFO error interrupt.

Disable Half transfer interrupt.

Disable Transfer error interrupt.

Disable Transfer complete interrupt.

Clear Stream 1 transfer error flag.

Clear Stream 2 transfer error flag.

Clear Stream 3 transfer error flag.

Clear Stream 4 transfer error flag.

Clear Stream 5 transfer error flag.

Clear Stream 6 transfer error flag.

Clear Stream 0 direct mode error flag.

Clear Stream 1 direct mode error flag.

Clear Stream 2 direct mode error flag.

Clear Stream 3 direct mode error flag.

Clear Stream 4 direct mode error flag.

Clear Stream 5 direct mode error flag.

Clear Stream 6 direct mode error flag.

Clear Stream 7 direct mode error flag.

Clear Stream 0 FIFO error flag.

Clear Stream 1 FIFO error flag.

Clear Stream 2 FIFO error flag.

Clear Stream 6 half transfer flag.

Clear Stream 7 half transfer flag.

Clear Stream 4 transfer complete flag.

Disable Direct mode error interrupt.

Disable FIFO error interrupt.

Check if Half transfer interrupt is enabled.

Check if Transfer error nterrup is enabled.

Check if Transfer complete interrupt is enabled.

Check if Direct mode error interrupt is enabled.

Check if FIFO error interrupt is enabled.

Get DMA mode normal, circular or peripheral flow control. CR PFCTRL LL_DMA_GetMode

Get Peripheral increment mode.

Check if DMA stream is enabled or disabled.

Get Number of data to transfer.

Get the Channel number associated to the Stream.

Get Stream priority level.

Get Memory increment mode.

Get Peripheral size.

Get Memory size.

Set Peripheral increment offset size.

Get Peripheral increment offset size.

Get Memory burst transfer configuration.

Get Peripheral burst transfer configuration.

Set Current target (only in double buffer mode) to Memory 1 or Memory 0.

Set Current target (only in double buffer mode) to Memory 1 or Memory 0.

Enable the double buffer mode.

Disable the double buffer mode.

Get FIFO status.

Disable Fifo mode.

Enable Fifo mode.

Select FIFO threshold.

Get FIFO threshold.