FMC_SDRAM_InitTypeDef struct

Specifies the SDRAM memory device that will be used. This parameter can be a value of FMC_SDRAM_Bank.

Defines the number of bits of column address. This parameter can be a value of FMC_SDRAM_Column_Bits_number.

Defines the number of bits of column address. This parameter can be a value of FMC_SDRAM_Row_Bits_number.

Defines the memory device width. This parameter can be a value of FMC_SDRAM_Memory_Bus_Width.

Defines the number of the device's internal banks. This parameter can be of FMC_SDRAM_Internal_Banks_Number.

Defines the SDRAM CAS latency in number of memory clock cycles. This parameter can be a value of FMC_SDRAM_CAS_Latency.

Enables the SDRAM device to be accessed in write mode. This parameter can be a value of FMC_SDRAM_Write_Protection.

Define the SDRAM Clock Period for both SDRAM devices and they allow to disable the clock before changing frequency. This parameter can be a value of FMC_SDRAM_Clock_Period.

This bit enable the SDRAM controller to anticipate the next read commands during the CAS latency and stores data in the Read FIFO. This parameter can be a value of FMC_SDRAM_Read_Burst.

Define the delay in system clock cycles on read data path. This parameter can be a value of FMC_SDRAM_Read_Pipe_Delay.