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LL_TIM_OSSR_ENABLE
from the following samples and libraries:
Examples
STM32F411RE-Nucleo
Examples_LL
TIM
TIM_BreakAndDeadtime
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STM32 Libraries and Samples
HAL
LL_TIM_OSSR_ENABLE
LL_TIM_OSSR_ENABLE macro
When inactive, OC/OCN outputs are enabled with their inactive level as soon as CCxE=1 or CCxNE=1
Syntax
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Declaration
from
stm32f4xx_ll_tim.h:866
#define
LL_TIM_OSSR_ENABLE
TIM_BDTR_OSSR
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LL_TIM_OSSR_ENABLE
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