CMSIS + 0/3 examples
SourceVu will show references to LPTIM_TypeDef from the following samples and libraries:
Examples
STM32F410xx-Nucleo
Examples_LL
LPTIM
 
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SummarySyntaxReferences

Fields

Field
Declared as
Description
__IO uint32_t
LPTIM Interrupt and Status register, Address offset: 0x00.
__IO uint32_t
LPTIM Interrupt Clear register, Address offset: 0x04.
__IO uint32_t
LPTIM Interrupt Enable register, Address offset: 0x08.
__IO uint32_t
LPTIM Configuration register, Address offset: 0x0C.
__IO uint32_t
LPTIM Control register, Address offset: 0x10.
__IO uint32_t
LPTIM Compare register, Address offset: 0x14.
__IO uint32_t
LPTIM Autoreload register, Address offset: 0x18.
__IO uint32_t
LPTIM Counter register, Address offset: 0x1C.
__IO uint32_t
LPTIM Option register, Address offset: 0x20.

References

from examples