FMC_Bank5_6_TypeDef struct
Flexible Memory Controller Bank5_6
Fields
SDRAM Timing registers , Address offset: 0x148-0x14C.
SDRAM Command Mode register, Address offset: 0x150.
SDRAM Refresh Timer register, Address offset: 0x154.
SDRAM Status register, Address offset: 0x158.
SDRAM Control registers , Address offset: 0x140-0x144.
Examples
FMC_Bank5_6_TypeDef is referenced by 14 libraries and example projects: