Helper function to set the PWM level for the slice and channel associated with a GPIO. Look up the correct slice (0 to 7) and channel (A or B) for a given GPIO, and update the corresponding counter compare field. This PWM slice should already have been configured and set running. Also be careful of multiple GPIOs mapping to the same slice and channel (if GPIOs have a difference of 16). The counter compare register is double-buffered in hardware. This means that, when the PWM is running, a write to the counter compare values does not take effect until the next time the PWM slice wraps (or, in phase-correct mode, the next time the slice reaches 0). If the PWM is not running, the write is latched in immediately.