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SourceVuRaspberry Pi Pico SDK and ExamplesPicoSDKpwm_hw_t

pwm_hw_t struct

Syntax

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Summary

Declaration

typedef struct { pwm_slice_hw_t slice[12]; _REG_(PWM_EN_OFFSET) io_rw_32 en; _REG_(PWM_INTR_OFFSET) io_rw_32 intr; union { struct { _REG_(PWM_IRQ0_INTE_OFFSET) io_rw_32 inte; _REG_(PWM_IRQ0_INTF_OFFSET) io_rw_32 intf; _REG_(PWM_IRQ0_INTS_OFFSET) io_rw_32 ints; _REG_(PWM_IRQ1_INTE_OFFSET) io_rw_32 inte1; _REG_(PWM_IRQ1_INTF_OFFSET) io_rw_32 intf1; _REG_(PWM_IRQ1_INTS_OFFSET) io_rw_32 ints1; }; pwm_irq_ctrl_hw_t irq_ctrl[2]; }; } pwm_hw_t;

Fields

Field

Declared as

pwm_hw_t::slice

pwm_slice_hw_t[12]

Examples

pwm_hw_t is referenced by 1 libraries and example projects:

logic_analyser sample

References

from 0/1 examples

Code

Location

Referrer

typedef struct {

static_assert(sizeof (pwm_hw_t) == 0x0110, "");

pwm_hw->slice[slice_num].csr = 0;

pwm_hw->slice[slice_num].ctr = PWM_CH0_CTR_RESET;

pwm_hw->slice[slice_num].cc = PWM_CH0_CC_RESET;

pwm_hw->slice[slice_num].top = c->top;

pwm_hw->slice[slice_num].div = c->div;

pwm_hw->slice[slice_num].csr = c->csr | (bool_to_bit(start) << PWM_CH0_CSR_EN_LSB);

pwm_hw->slice[slice_num].top = wrap;

&pwm_hw->slice[slice_num].cc,

pwm_set_chan_level()

pwm_hw->slice[slice_num].cc = (((uint)level_b) << PWM_CH0_CC_B_LSB) | (((uint)level_a) << PWM_CH0_CC_A_LSB);

pwm_set_both_levels()

return (uint16_t)(pwm_hw->slice[slice_num].ctr);

pwm_get_counter()

pwm_hw->slice[slice_num].ctr = c;

pwm_set_counter()

hw_set_bits(&pwm_hw->slice[slice_num].csr, PWM_CH0_CSR_PH_ADV_BITS);

pwm_advance_count()

while (pwm_hw->slice[slice_num].csr & PWM_CH0_CSR_PH_ADV_BITS) {

pwm_advance_count()

hw_set_bits(&pwm_hw->slice[slice_num].csr, PWM_CH0_CSR_PH_RET_BITS);

pwm_retard_count()

while (pwm_hw->slice[slice_num].csr & PWM_CH0_CSR_PH_RET_BITS) {

pwm_retard_count()

pwm_hw->slice[slice_num].div = (((uint)integer) << PWM_CH0_DIV_INT_LSB) | (((uint)fract) << PWM_CH0_DIV_FRAC_LSB);

pwm_set_clkdiv_int_frac()

hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(a) << PWM_CH0_CSR_A_INV_LSB | bool_to_bit(b) << PWM_CH0_CSR_B_INV_LSB,

pwm_set_output_polarity()

hw_write_masked(&pwm_hw->slice[slice_num].csr, ((uint)mode) << PWM_CH0_CSR_DIVMODE_LSB, PWM_CH0_CSR_DIVMODE_BITS);

pwm_set_clkdiv_mode()

hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(phase_correct) << PWM_CH0_CSR_PH_CORRECT_LSB, PWM_CH0_CSR_PH_CORRECT_BITS);

pwm_set_phase_correct()

hw_write_masked(&pwm_hw->slice[slice_num].csr, bool_to_bit(enabled) << PWM_CH0_CSR_EN_LSB, PWM_CH0_CSR_EN_BITS);

pwm_set_enabled()

pwm_hw->en = mask;

pwm_set_mask_enabled()

hw_set_bits(&pwm_hw->inte, 1u << slice_num);

pwm_set_irq_enabled()

hw_clear_bits(&pwm_hw->inte, 1u << slice_num);

pwm_set_irq_enabled()

hw_set_bits(&pwm_hw->inte1, 1u << slice_num);

pwm_set_irq1_enabled()

hw_clear_bits(&pwm_hw->inte1, 1u << slice_num);

pwm_set_irq1_enabled()

hw_set_bits(&pwm_hw->irq_ctrl[irq_index].inte, 1u << slice_num);

pwm_irqn_set_slice_enabled()

hw_clear_bits(&pwm_hw->irq_ctrl[irq_index].inte, 1u << slice_num);

pwm_irqn_set_slice_enabled()

hw_set_bits(&pwm_hw->irq_ctrl[irq_index].inte, slice_mask);

pwm_set_irq_mask_enabled()

hw_clear_bits(&pwm_hw->irq_ctrl[irq_index].inte, slice_mask);

pwm_set_irq_mask_enabled()

hw_set_bits(&pwm_hw->inte1, slice_mask);

pwm_set_irq1_mask_enabled()

hw_clear_bits(&pwm_hw->inte1, slice_mask);

pwm_set_irq1_mask_enabled()

hw_set_bits(&pwm_hw->irq_ctrl[irq_index].inte, slice_mask);

pwm_irqn_set_slice_mask_enabled()

hw_clear_bits(&pwm_hw->irq_ctrl[irq_index].inte, slice_mask);

pwm_irqn_set_slice_mask_enabled()

pwm_hw->intr = 1u << slice_num;

pwm_clear_irq()

return pwm_hw->ints;

pwm_get_irq_status_mask()

return pwm_hw->ints1;

pwm_get_irq1_status_mask()

return pwm_hw->irq_ctrl[irq_index].ints;

pwm_irqn_get_status_mask()

pwm_hw->intf = 1u << slice_num;

pwm_force_irq()

pwm_hw->intf1 = 1u << slice_num;

pwm_force_irq1()

pwm_hw->irq_ctrl[irq_index].intf = 1u << slice_num;

pwm_irqn_force()