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SourceVuESP-IDF Framework and ExamplesESP-IDFsyscon_dev_s

syscon_dev_s struct

Syntax

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Summary

Declaration

struct syscon_dev_s { union { struct { uint32_t pre_div: 10; uint32_t clk_320m_en: 1; uint32_t clk_en: 1; uint32_t rst_tick: 1; uint32_t quick_clk_chng: 1; uint32_t reserved14: 18; }; uint32_t val; }clk_conf; union { struct { uint32_t xtal_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }xtal_tick_conf; union { struct { uint32_t pll_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }pll_tick_conf; union { struct { uint32_t ck8m_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }ck8m_tick_conf; union { struct { uint32_t start_force: 1; uint32_t start: 1; uint32_t sar2_mux: 1; uint32_t work_mode: 2; uint32_t sar_sel: 1; uint32_t sar_clk_gated: 1; uint32_t sar_clk_div: 8; uint32_t sar1_patt_len: 4; uint32_t sar2_patt_len: 4; uint32_t sar1_patt_p_clear: 1; uint32_t sar2_patt_p_clear: 1; uint32_t data_sar_sel: 1; uint32_t data_to_i2s: 1; uint32_t reserved27: 5; }; uint32_t val; }saradc_ctrl; union { struct { uint32_t meas_num_limit: 1; uint32_t max_meas_num: 8; uint32_t sar1_inv: 1; uint32_t sar2_inv: 1; uint32_t reserved11: 21; }; uint32_t val; }saradc_ctrl2; union { struct { uint32_t rstb_wait: 8; uint32_t standby_wait: 8; uint32_t start_wait: 8; uint32_t sample_cycle: 8; }; uint32_t val; }saradc_fsm; uint32_t saradc_sar1_patt_tab[4]; uint32_t saradc_sar2_patt_tab[4]; union { struct { uint32_t apll_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }apll_tick_conf; uint32_t reserved_40; uint32_t reserved_44; uint32_t reserved_48; uint32_t reserved_4c; uint32_t reserved_50; uint32_t reserved_54; uint32_t reserved_58; uint32_t reserved_5c; uint32_t reserved_60; uint32_t reserved_64; uint32_t reserved_68; uint32_t reserved_6c; uint32_t reserved_70; uint32_t reserved_74; uint32_t reserved_78; uint32_t date; };

Fields

Field

Declared as

syscon_dev_s::xtal_tick_conf

union { struct { uint32_t xtal_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }

syscon_dev_s::pll_tick_conf

union { struct { uint32_t pll_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }

syscon_dev_s::ck8m_tick_conf

union { struct { uint32_t ck8m_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }

syscon_dev_s::saradc_ctrl

union { struct { uint32_t start_force: 1; uint32_t start: 1; uint32_t sar2_mux: 1; uint32_t work_mode: 2; uint32_t sar_sel: 1; uint32_t sar_clk_gated: 1; uint32_t sar_clk_div: 8; uint32_t sar1_patt_len: 4; uint32_t sar2_patt_len: 4; uint32_t sar1_patt_p_clear: 1; uint32_t sar2_patt_p_clear: 1; uint32_t data_sar_sel: 1; uint32_t data_to_i2s: 1; uint32_t reserved27: 5; }; uint32_t val; }

syscon_dev_s::saradc_ctrl2

union { struct { uint32_t meas_num_limit: 1; uint32_t max_meas_num: 8; uint32_t sar1_inv: 1; uint32_t sar2_inv: 1; uint32_t reserved11: 21; }; uint32_t val; }

syscon_dev_s::saradc_fsm

union { struct { uint32_t rstb_wait: 8; uint32_t standby_wait: 8; uint32_t start_wait: 8; uint32_t sample_cycle: 8; }; uint32_t val; }

syscon_dev_s::saradc_sar1_patt_tab

uint32_t[4]

syscon_dev_s::saradc_sar2_patt_tab

uint32_t[4]

syscon_dev_s::apll_tick_conf

union { struct { uint32_t apll_tick: 8; uint32_t reserved8: 24; }; uint32_t val; }

syscon_dev_s::reserved_40

uint32_t

syscon_dev_s::reserved_44

uint32_t

syscon_dev_s::reserved_48

uint32_t

syscon_dev_s::reserved_4c

uint32_t

syscon_dev_s::reserved_50

uint32_t

syscon_dev_s::reserved_54

uint32_t

syscon_dev_s::reserved_58

uint32_t

syscon_dev_s::reserved_5c

uint32_t

syscon_dev_s::reserved_60

uint32_t

syscon_dev_s::reserved_64

uint32_t

syscon_dev_s::reserved_68

uint32_t

syscon_dev_s::reserved_6c

uint32_t

syscon_dev_s::reserved_70

uint32_t

syscon_dev_s::reserved_74

uint32_t

syscon_dev_s::reserved_78

uint32_t

syscon_dev_s::date

uint32_t

syscon_dev_s::clk_conf

union { struct { uint32_t pre_div: 10; uint32_t clk_320m_en: 1; uint32_t clk_en: 1; uint32_t rst_tick: 1; uint32_t quick_clk_chng: 1; uint32_t reserved14: 18; }; uint32_t val; }