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spi_flash_hal_configure_host_io_mode() function
Configure the SPI host hardware registers for the specified io mode. Note that calling this configures SPI host registers, so if running any other commands as part of set_io_mode() then these must be run before calling this function. The command value, address length and dummy cycles are configured according to the format of read commands: - command: 8 bits, value set. - address: 24 bits - dummy: cycles to compensate the input delay - out & in data: 0 bits. The following commands still need to: - Read data: set address value and data (length and contents), no need to touch command and dummy phases. - Common read: set command value, address value (or length to 0 if not used) - Common write: set command value, address value (or length to 0 if not used), disable dummy phase, and set output data.
Syntax
esp_err_t spi_flash_hal_configure_host_io_mode(spi_flash_host_inst_t *host,
uint32_t command,
uint32_t addr_bitlen,
int dummy_cyclelen_base,
esp_flash_io_mode_t io_mode);
Implemented in ![]()
spi_flash_hal_common.inc:81
Return value
always return ESP_OK.
Related Functions
Found 28 other functions taking a ![]()
spi_flash_host_inst_t
argument:
Function
Description
Erase whole flash chip by using the erase chip (C7h) command.
Erase a specific sector by its start address through the sector erase (20h) command. For 24bit address only.
Erase a specific 64KB block by its start address through the 64KB block erase (D8h) command. For 24bit address only.
Program a page of the flash using the page program (02h) command. For 24bit address only.
Read from the flash. Call ``spi_flash_hal_configure_host_read_mode`` to configure the read command before calling this function.
Send the write enable (06h) or write disable (04h) command to the flash chip.
Check whether the SPI host is idle and can perform other operations.
Poll until the last operation is done.
Check whether the given buffer can be used as the write buffer directly. If 'chip' is connected to the main SPI bus, we can only write directly from regions that are accessible ith cache disabled. *
Check whether the given buffer can be used as the read buffer directly. If 'chip' is connected to the main SPI bus, we can only read directly from regions that are accessible ith cache disabled. *
Resume flash chip status from suspend.
Set the flash into suspend status manually.
To setup for reading flash suspend status register
Configure the device-related register before transactions.
Send an user-defined spi transaction to the device.
NOTICE Rest part of this file are part of the HAL layer The HAL is not public api, don't use in application code. See readme.md in hal/include/hal/readme.md Read the Status Register read from RDSR (05h). High speed implementation of RDID through memspi interface relying on the ``common_command``.
High speed implementation of RDSR through memspi interface relying on the ``common_command``.
Flush the cache (if needed) after the contents are modified.
Slicer for write data used in non-encrypted regions. This slicer limit the length to the maximum size the host supports, and truncate if the write data lie accross the page boundary (256 bytes)
Slicer for read data used in non-encrypted regions. This slicer does nothing but limit the length to the maximum size the host supports.
Erase a sector starting from a given address. For 24bit address only.
Erase a block starting from a given address. For 24bit address only.
Program a page with contents of a buffer. For 24bit address only.
Erase contents of entire chip.
Read data to buffer.
Set ability to write to chip.