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SourceVuESP-IDF Framework and ExamplesESP-IDFsoc_periph_adc_digi_clk_src_t

soc_periph_adc_digi_clk_src_t enum

Syntax

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Summary

Declaration

from clk_tree_defs.h:392

enum { ADC_DIGI_CLK_SRC_PLL_F160M = SOC_MOD_CLK_PLL_F160M, ADC_DIGI_CLK_SRC_APLL = SOC_MOD_CLK_APLL, ADC_DIGI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, };

Values

Value

Declared as

Description

soc_periph_adc_digi_clk_src_t::ADC_DIGI_CLK_SRC_PLL_F160M

= SOC_MOD_CLK_PLL_F160M

Select F160M as the source clock.

soc_periph_adc_digi_clk_src_t::ADC_DIGI_CLK_SRC_APLL

= SOC_MOD_CLK_APLL

Select APLL as the source clock.

soc_periph_adc_digi_clk_src_t::ADC_DIGI_CLK_SRC_DEFAULT

= SOC_MOD_CLK_PLL_F160M

Select F160M as the default clock choice.

References

Code

Location

Scope

Referrer

typedef soc_periph_adc_digi_clk_src_t adc_continuous_clk_src_t; ///< Clock source type of continuous mode which uses digital controller

adc_types.h:95

typedef enum {

clk_tree_defs.h:392

} soc_periph_adc_digi_clk_src_t;

clk_tree_defs.h:396

static void adc_hal_digi_sample_freq_config(adc_hal_dma_ctx_t *hal, adc_continuous_clk_src_t clk_src, uint32_t clk_src_freq_hz, uint32_t sample_freq_hz)

adc_hal.c:119

adc_hal_digi_sample_freq_config()

adc_hal_digi_sample_freq_config()::clk_src

adc_continuous_clk_src_t clk_src; ///< Clock source

adc_hal.h:81

adc_hal_digi_ctrlr_cfg_t

adc_hal_digi_ctrlr_cfg_t::clk_src

typedef soc_periph_adc_digi_clk_src_t adc_continuous_clk_src_t; ///< Clock source type of continuous mode which uses digital controller

adc_types.h:95

adc_continuous_clk_src_t

} soc_periph_adc_digi_clk_src_t;

clk_tree_defs.h:396

soc_periph_adc_digi_clk_src_t

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Instances

Instance

Scope

Location

Project

adc_hal_digi_ctrlr_cfg_t::clk_src

adc_hal_digi_ctrlr_cfg_t

adc_hal.h:81

adc_hal_digi_sample_freq_config()::clk_src

adc_hal_digi_sample_freq_config()

adc_hal.c:119

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