SOC_MOD_CLK_PLL_F160M - syntax, references, description

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Referrer

SOC_MOD_CLK_PLL_F160M, /*!< PLL_F160M_CLK is derived from PLL, and has a fixed frequency of 160MHz */

clk_tree_defs.h:124

LCD_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_160M as the source clock */

clk_tree_defs.h:187

LCD_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_160M as the default choice */

clk_tree_defs.h:188

MCPWM_TIMER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */

clk_tree_defs.h:243

MCPWM_TIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default clock choice */

clk_tree_defs.h:244

MCPWM_CARRIER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */

clk_tree_defs.h:269

MCPWM_CARRIER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default clock choice */

clk_tree_defs.h:270

I2S_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default source clock */

clk_tree_defs.h:284

I2S_CLK_SRC_PLL_160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */

clk_tree_defs.h:285

ADC_DIGI_CLK_SRC_PLL_F160M = SOC_MOD_CLK_PLL_F160M, /*!< Select F160M as the source clock */

clk_tree_defs.h:393

ADC_DIGI_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select F160M as the default clock choice */

clk_tree_defs.h:395

SDMMC_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_160M as the default choice */

clk_tree_defs.h:458

SDMMC_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_160M as the source clock */

clk_tree_defs.h:459

case SOC_MOD_CLK_PLL_F160M:

esp_clk_tree.c:39

esp_clk_tree_src_get_freq_hz()

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Data Use

SOC_MOD_CLK_PLL_F160M is read by 1 function:

SOC_MOD_CLK_PLL_F160M

esp_clk_tree_src_get_freq_hz()

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SOC_MOD_CLK_PLL_F160M value

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