soc_module_clk_t enum

CPU_CLK can be sourced from XTAL, PLL, RC_FAST, or APLL by configuring soc_cpu_clk_src_t.

RTC_FAST_CLK can be sourced from XTAL_D4 or RC_FAST by configuring soc_rtc_fast_clk_src_t.

RTC_SLOW_CLK can be sourced from RC_SLOW, XTAL32K, or RC_FAST_D256 by configuring soc_rtc_slow_clk_src_t.

APB_CLK is highly dependent on the CPU_CLK source.

PLL_D2_CLK is derived from PLL, it has a fixed divider of 2.

PLL_F160M_CLK is derived from PLL, and has a fixed frequency of 160MHz.

XTAL32K_CLK comes from the external 32kHz crystal, passing a clock gating to the peripherals.

RC_FAST_CLK comes from the internal 8MHz rc oscillator, passing a clock gating to the peripherals.

RC_FAST_D256_CLK comes from the internal 8MHz rc oscillator, divided by 256, and passing a clock gating to the peripherals.

XTAL_CLK comes from the external crystal (2~40MHz).

REF_TICK is derived from APB, it has a fixed frequency of 1MHz even when APB frequency changes.

APLL is sourced from PLL, and its frequency is configurable through APLL configuration registers.

Indication of the end of the available module clock sources.