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i2s_pdm_tx_clk_config_t struct
I2S clock configuration for PDM TX mode
Syntax
typedef struct
{
uint32_t sample_rate_hz;
i2s_clock_src_t clk_src;
i2s_mclk_multiple_t mclk_multiple;
uint32_t up_sample_fp;
uint32_t up_sample_fs;
uint32_t bclk_div;
} i2s_pdm_tx_clk_config_t;
Fields
Field
Declared as
Description
uint32_t
I2S sample rate, not suggest to exceed 48000 Hz, otherwise more glitches and noise may appear.
uint32_t
Up-sampling param fs, not allowed to be greater than 480.
uint32_t
The division from MCLK to BCLK. The minimum value is I2S_PDM_TX_BCLK_DIV_MIN. It will be set to I2S_PDM_TX_BCLK_DIV_MIN by default if it is smaller than I2S_PDM_TX_BCLK_DIV_MIN.
Related Functions
Found 3 other functions taking a i2s_pdm_tx_clk_config_t
argument:
Function
Description
Reconfigure the I2S clock for PDM TX mode