i2s_pdm_rx_clk_config_t struct

I2S clock configuration for PDM RX mode

Syntax

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Summary

Declaration

from i2s_pdm.h:93

typedef struct { uint32_t sample_rate_hz; i2s_clock_src_t clk_src; i2s_mclk_multiple_t mclk_multiple; i2s_pdm_dsr_t dn_sample_mode; uint32_t bclk_div; } i2s_pdm_rx_clk_config_t;

Fields

Field

Declared as

Description

i2s_pdm_rx_clk_config_t::bclk_div

uint32_t

The division from MCLK to BCLK. The typical and minimum value is I2S_PDM_RX_BCLK_DIV_MIN. It will be set to I2S_PDM_RX_BCLK_DIV_MIN by default if it is smaller than I2S_PDM_RX_BCLK_DIV_MIN.

i2s_pdm_rx_clk_config_t::sample_rate_hz

uint32_t

I2S sample rate.

i2s_pdm_rx_clk_config_t::clk_src

i2s_clock_src_t

Choose clock source.

i2s_pdm_rx_clk_config_t::mclk_multiple

i2s_mclk_multiple_t

The multiple of MCLK to the sample rate.

i2s_pdm_rx_clk_config_t::dn_sample_mode

i2s_pdm_dsr_t

Down-sampling rate mode.