esp_image_header_t struct

Magic word ESP_IMAGE_HEADER_MAGIC.

Count of memory segments.

flash read mode (esp_image_spi_mode_t as uint8_t).

flash frequency (esp_image_spi_freq_t as uint8_t).

flash chip size (esp_image_flash_size_t as uint8_t).

Entry address.

WP pin when SPI pins set via efuse (read by ROM bootloader, the IDF bootloader uses software to configure the WP pin and sets this field to 0xEE=disabled).

Drive settings for the SPI flash pins (read by ROM bootloader).

Chip identification number.

Minimal chip revision supported by image After the Major and Minor revision eFuses were introduced into the chips, this field is no longer used. But for compatibility reasons, we keep this field and the data in it. Use min_chip_rev_full instead. The software interprets this as a Major version for most of the chips and as a Minor version for the ESP32-C3.

Minimal chip revision supported by image, in format: major * 100 + minor.

Maximal chip revision supported by image, in format: major * 100 + minor.

Reserved bytes in additional header space, currently unused.

If 1, a SHA256 digest "simple hash" (of the entire image) is appended after the checksum. Included in image length. This digest is separate to secure boot and only used for detecting corruption. For secure boot signed images, the signature is appended after this (and the simple hash is included in the signed data).