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SourceVuESP-IDF Framework and ExamplesESP-IDFcache_sram_mmu_set()

cache_sram_mmu_set() function

Set Ext-SRAM-Cache mmu mapping. Please do not call this function in your SDK application. Note that this code lives in IRAM and has a bugfix in respect to the ROM version of this function (which erroneously refused a vaddr > 2MiB

Syntax

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Summary

Declaration

Definition

from cache.h:111

unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);

Implemented in cache_sram_mmu.c:55

Arguments

Argument

cpu_no

pid

vaddr

paddr

psize

num

Return value

unsigned int: error status 0 : mmu set success 1 : vaddr or paddr is not aligned 2 : pid error 3 : psize error 4 : mmu table to be written is out of range 5 : vaddr is out of range

References

Code

Location

Referrer

unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num)

cache_sram_mmu.c:55

unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num);

r = cache_sram_mmu_set(0, 0, SOC_EXTRAM_DATA_LOW + CACHE_BLOCKSIZE * virt_bank, phys_bank * CACHE_BLOCKSIZE, 32, ct);

esp_himem.c:107

r = cache_sram_mmu_set(1, 0, SOC_EXTRAM_DATA_LOW + CACHE_BLOCKSIZE * virt_bank, phys_bank * CACHE_BLOCKSIZE, 32, ct);

esp_himem.c:109

cache_sram_mmu_set(0, 0, v_start, 0, 32, (size / 1024 / 32));

esp_psram.c:122

cache_sram_mmu_set(1, 0, v_start, 0, 32, (size / 1024 / 32));

esp_psram.c:126

Call Tree

cache_sram_mmu_set() is called by 2 functions and calls 5 functions:

cache_sram_mmu_set()

esp_dport_access_reg_read()

spi_flash_guard_funcs_t::start

spi_flash_guard_funcs_t::end

spi_flash_guard_get()

cache_sram_mmu_set_rom()

Data Use

cache_sram_mmu_set():

cache_sram_mmu_set()

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