mips32_read_config_fpu() function

mips32_set_all_fpr_width - Set the width of all floating-point registers Sets the width of all floating-point registers based on the specified flag.

mips32_detect_fpr_mode_change - Detect changes in floating-point register mode Detects changes in the floating-point register mode based on the CP0 status register. If changes are detected, it updates the internal state and logs a warning message indicating the mode change.

mips32_read_config_fdc - Read Fast Debug Channel configuration Checks if the current target implements the Common Device Memory Map (CDMM) and Fast Debug Channel (FDC). This function examines the configuration registers and the Device Configuration Register (DCR) to determine if the current MIPS32 target supports the Common Device Memory Map (CDMM) and the Fast Debug Channel (FDC). If supported, it sets the corresponding flags in the MIPS32 common structure. \n NOTE:These are defined on MD00090, page 67 and MD00047F, page 82, respectively. MIPS Documents are pretty much all available online, it should pop up first when you search "MDxxxxx"

mips32_cp0_set_reg_by_name - Write to a CP0 register identified by name. Writes a value to a CP0 register specified by name. Updates internal cache if specific registers (STATUS, CAUSE, DEPC, GUESTCTL1) are modified.

mips32_cp0_set_reg_by_number - Write to a CP0 register identified by number. Writes a value to a CP0 register specified by number and selection. Handles special cases like updating the internal cache for certain registers.