lattice_ecp5_erase_sram() function

@file The JTAG interface can be implemented with a software or hardware fifo. TAP_DRSHIFT and TAP_IRSHIFT are illegal end states; however, TAP_DRSHIFT/IRSHIFT can be emulated as end states, by using longer scans. Code that is relatively insensitive to the path taken through state machine (as long as it is JTAG compliant) can use @a endstate for jtag_add_xxx_scan(). Otherwise, the pause state must be specified as end state and a subsequent jtag_add_pathmove() must be issued. Generate an IR SCAN with a list of scan fields with one entry for each enabled TAP. If the input field list contains an instruction value for a TAP then that is used otherwise the TAP is set to bypass. TAPs for which no fields are passed are marked as bypassed for subsequent DR SCANs.

The same as jtag_add_ir_scan except no verification is performed out the output values.

Generate a DR SCAN using the fields passed to the function. For connected TAPs, the function checks in_fields and uses fields specified there. For bypassed TAPs, the function generates a dummy 1-bit field. The bypass status of TAPs is set by jtag_add_ir_scan().

A version of jtag_add_dr_scan() that uses the check_value/mask fields

see jtag_add_ir_scan()

see jtag_add_dr_scan()

Append a new TAP to the chain of all taps.

This is an inner loop of the open loop DCC write of data to target

once read registers

once read register with register len

once read register

once write register

single word instruction

double word instruction

single word instruction