arm7tdmi_clock_data_in_endianness() function

Receive a block of size 32-bit words from the DCC. We assume the target is always going to be fast enough (relative to the JTAG clock) that the debugger won't need to poll the handshake bit. The JTAG clock is usually at least six times slower than the functional clock, so the 50+ JTAG clocks needed to receive the word allow hundreds of instruction cycles (per word) in the target.

Send a block of size 32-bit words to the DCC. We assume the target is always going to be fast enough (relative to the JTAG clock) that the debugger won't need to poll the handshake bit. The JTAG clock is usually at least six times slower than the functional clock, so the 50+ JTAG clocks needed to receive the word allow hundreds of instruction cycles (per word) in the target.

Poll DCC control register until read or write handshake completes.