Switch the PLL source from HSI to HSE bypass, and select the PLL as SYSCLK source. The system Clock is configured as follows : System Clock source = PLL (HSE bypass) SYSCLK(Hz) = 100000000 HCLK(Hz) = 100000000 AHB Prescaler = 1 APB1 Prescaler = 2 APB2 Prescaler = 1 Flash Latency(WS) = 5