__SPI_HandleTypeDef::Instance - syntax, references, description

References

from 0/44 examples

Code

Location

Referrer

SPI_TypeDef *Instance; /*!< SPI registers base address */

stm32f4xx_hal_spi.h:106

assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));

stm32f4xx_hal_spi.c:320

HAL_SPI_Init()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:393

HAL_SPI_Init()

WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |

stm32f4xx_hal_spi.c:398

HAL_SPI_Init()

WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF)));

stm32f4xx_hal_spi.c:409

HAL_SPI_Init()

WRITE_REG(hspi->Instance->CRCPR, (hspi->Init.CRCPolynomial & SPI_CRCPR_CRCPOLY_Msk));

stm32f4xx_hal_spi.c:416

HAL_SPI_Init()

CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);

stm32f4xx_hal_spi.c:422

HAL_SPI_Init()

assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));

stm32f4xx_hal_spi.c:446

HAL_SPI_DeInit()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:451

HAL_SPI_DeInit()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:815

HAL_SPI_Transmit()

SPI_1LINE_TX(hspi);

stm32f4xx_hal_spi.c:816

HAL_SPI_Transmit()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:823

HAL_SPI_Transmit()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:828

HAL_SPI_Transmit()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:831

HAL_SPI_Transmit()

hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:839

HAL_SPI_Transmit()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))

stm32f4xx_hal_spi.c:847

HAL_SPI_Transmit()

hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:849

HAL_SPI_Transmit()

*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:870

HAL_SPI_Transmit()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))

stm32f4xx_hal_spi.c:877

HAL_SPI_Transmit()

*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:879

HAL_SPI_Transmit()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:899

HAL_SPI_Transmit()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:912

HAL_SPI_Transmit()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:990

HAL_SPI_Receive()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:1000

HAL_SPI_Receive()

SPI_1LINE_RX(hspi);

stm32f4xx_hal_spi.c:1001

HAL_SPI_Receive()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1005

HAL_SPI_Receive()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:1008

HAL_SPI_Receive()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))

stm32f4xx_hal_spi.c:1018

HAL_SPI_Receive()

(* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;

stm32f4xx_hal_spi.c:1021

HAL_SPI_Receive()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))

stm32f4xx_hal_spi.c:1043

HAL_SPI_Receive()

*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;

stm32f4xx_hal_spi.c:1045

HAL_SPI_Receive()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:1067

HAL_SPI_Receive()

*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;

stm32f4xx_hal_spi.c:1080

HAL_SPI_Receive()

(*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;

stm32f4xx_hal_spi.c:1085

HAL_SPI_Receive()

tmpreg = READ_REG(hspi->Instance->DR);

stm32f4xx_hal_spi.c:1097

HAL_SPI_Receive()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))

stm32f4xx_hal_spi.c:1111

HAL_SPI_Receive()

__HAL_SPI_CLEAR_CRCERRFLAG(hspi);

stm32f4xx_hal_spi.c:1114

HAL_SPI_Receive()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:1207

HAL_SPI_TransmitReceive()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1212

HAL_SPI_TransmitReceive()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:1215

HAL_SPI_TransmitReceive()

hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:1223

HAL_SPI_TransmitReceive()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:1231

HAL_SPI_TransmitReceive()

if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))

stm32f4xx_hal_spi.c:1239

HAL_SPI_TransmitReceive()

hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:1241

HAL_SPI_TransmitReceive()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:1251

HAL_SPI_TransmitReceive()

if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))

stm32f4xx_hal_spi.c:1257

HAL_SPI_TransmitReceive()

*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;

stm32f4xx_hal_spi.c:1259

HAL_SPI_TransmitReceive()

*((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:1278

HAL_SPI_TransmitReceive()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:1286

HAL_SPI_TransmitReceive()

if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))

stm32f4xx_hal_spi.c:1293

HAL_SPI_TransmitReceive()

*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:1295

HAL_SPI_TransmitReceive()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:1305

HAL_SPI_TransmitReceive()

if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))

stm32f4xx_hal_spi.c:1311

HAL_SPI_TransmitReceive()

(*(uint8_t *)hspi->pRxBuffPtr) = hspi->Instance->DR;

stm32f4xx_hal_spi.c:1313

HAL_SPI_TransmitReceive()

tmpreg = READ_REG(hspi->Instance->DR);

stm32f4xx_hal_spi.c:1341

HAL_SPI_TransmitReceive()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))

stm32f4xx_hal_spi.c:1347

HAL_SPI_TransmitReceive()

__HAL_SPI_CLEAR_CRCERRFLAG(hspi);

stm32f4xx_hal_spi.c:1351

HAL_SPI_TransmitReceive()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:1368

HAL_SPI_TransmitReceive()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:1443

HAL_SPI_Transmit_IT()

SPI_1LINE_TX(hspi);

stm32f4xx_hal_spi.c:1444

HAL_SPI_Transmit_IT()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:1451

HAL_SPI_Transmit_IT()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1456

HAL_SPI_Transmit_IT()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:1459

HAL_SPI_Transmit_IT()

__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:1465

HAL_SPI_Transmit_IT()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:1534

HAL_SPI_Receive_IT()

SPI_1LINE_RX(hspi);

stm32f4xx_hal_spi.c:1535

HAL_SPI_Receive_IT()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:1542

HAL_SPI_Receive_IT()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1551

HAL_SPI_Receive_IT()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:1554

HAL_SPI_Receive_IT()

__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:1560

HAL_SPI_Receive_IT()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:1635

HAL_SPI_TransmitReceive_IT()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1641

HAL_SPI_TransmitReceive_IT()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:1644

HAL_SPI_TransmitReceive_IT()

__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:1650

HAL_SPI_TransmitReceive_IT()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:1707

HAL_SPI_Transmit_DMA()

SPI_1LINE_TX(hspi);

stm32f4xx_hal_spi.c:1708

HAL_SPI_Transmit_DMA()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:1715

HAL_SPI_Transmit_DMA()

if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,

stm32f4xx_hal_spi.c:1732

HAL_SPI_Transmit_DMA()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1743

HAL_SPI_Transmit_DMA()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:1746

HAL_SPI_Transmit_DMA()

__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));

stm32f4xx_hal_spi.c:1750

HAL_SPI_Transmit_DMA()

SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);

stm32f4xx_hal_spi.c:1753

HAL_SPI_Transmit_DMA()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:1821

HAL_SPI_Receive_DMA()

SPI_1LINE_RX(hspi);

stm32f4xx_hal_spi.c:1822

HAL_SPI_Receive_DMA()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:1829

HAL_SPI_Receive_DMA()

if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr,

stm32f4xx_hal_spi.c:1846

HAL_SPI_Receive_DMA()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1857

HAL_SPI_Receive_DMA()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:1860

HAL_SPI_Receive_DMA()

__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));

stm32f4xx_hal_spi.c:1864

HAL_SPI_Receive_DMA()

SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:1867

HAL_SPI_Receive_DMA()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:1942

HAL_SPI_TransmitReceive_DMA()

if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr,

stm32f4xx_hal_spi.c:1967

HAL_SPI_TransmitReceive_DMA()

SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:1978

HAL_SPI_TransmitReceive_DMA()

if (HAL_OK != HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR,

stm32f4xx_hal_spi.c:1988

HAL_SPI_TransmitReceive_DMA()

if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)

stm32f4xx_hal_spi.c:1999

HAL_SPI_TransmitReceive_DMA()

__HAL_SPI_ENABLE(hspi);

stm32f4xx_hal_spi.c:2002

HAL_SPI_TransmitReceive_DMA()

__HAL_SPI_ENABLE_IT(hspi, (SPI_IT_ERR));

stm32f4xx_hal_spi.c:2005

HAL_SPI_TransmitReceive_DMA()

SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);

stm32f4xx_hal_spi.c:2008

HAL_SPI_TransmitReceive_DMA()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);

stm32f4xx_hal_spi.c:2041

HAL_SPI_Abort()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))

stm32f4xx_hal_spi.c:2044

HAL_SPI_Abort()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))

stm32f4xx_hal_spi.c:2061

HAL_SPI_Abort()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))

stm32f4xx_hal_spi.c:2079

HAL_SPI_Abort()

CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN));

stm32f4xx_hal_spi.c:2095

HAL_SPI_Abort()

} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);

stm32f4xx_hal_spi.c:2106

HAL_SPI_Abort()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))

stm32f4xx_hal_spi.c:2111

HAL_SPI_Abort()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:2127

HAL_SPI_Abort()

CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXDMAEN));

stm32f4xx_hal_spi.c:2130

HAL_SPI_Abort()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:2150

HAL_SPI_Abort()

__HAL_SPI_CLEAR_FREFLAG(hspi);

stm32f4xx_hal_spi.c:2151

HAL_SPI_Abort()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);

stm32f4xx_hal_spi.c:2188

HAL_SPI_Abort_IT()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))

stm32f4xx_hal_spi.c:2191

HAL_SPI_Abort_IT()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))

stm32f4xx_hal_spi.c:2208

HAL_SPI_Abort_IT()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))

stm32f4xx_hal_spi.c:2232

HAL_SPI_Abort_IT()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))

stm32f4xx_hal_spi.c:2246

HAL_SPI_Abort_IT()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXDMAEN))

stm32f4xx_hal_spi.c:2257

HAL_SPI_Abort_IT()

if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXDMAEN))

stm32f4xx_hal_spi.c:2275

HAL_SPI_Abort_IT()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:2312

HAL_SPI_Abort_IT()

__HAL_SPI_CLEAR_FREFLAG(hspi);

stm32f4xx_hal_spi.c:2313

HAL_SPI_Abort_IT()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:2341

HAL_SPI_DMAPause()

SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:2361

HAL_SPI_DMAResume()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:2404

HAL_SPI_DMAStop()

uint32_t itsource = hspi->Instance->CR2;

stm32f4xx_hal_spi.c:2417

HAL_SPI_IRQHandler()

uint32_t itflag = hspi->Instance->SR;

stm32f4xx_hal_spi.c:2418

HAL_SPI_IRQHandler()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:2445

HAL_SPI_IRQHandler()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:2449

HAL_SPI_IRQHandler()

__HAL_SPI_CLEAR_MODFFLAG(hspi);

stm32f4xx_hal_spi.c:2458

HAL_SPI_IRQHandler()

__HAL_SPI_CLEAR_FREFLAG(hspi);

stm32f4xx_hal_spi.c:2465

HAL_SPI_IRQHandler()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);

stm32f4xx_hal_spi.c:2471

HAL_SPI_IRQHandler()

CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN));

stm32f4xx_hal_spi.c:2477

HAL_SPI_IRQHandler()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);

stm32f4xx_hal_spi.c:2720

SPI_DMATransmitCplt()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);

stm32f4xx_hal_spi.c:2723

SPI_DMATransmitCplt()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:2734

SPI_DMATransmitCplt()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);

stm32f4xx_hal_spi.c:2780

SPI_DMAReceiveCplt()

tmpreg = READ_REG(hspi->Instance->DR);

stm32f4xx_hal_spi.c:2793

SPI_DMAReceiveCplt()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:2803

SPI_DMAReceiveCplt()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:2808

SPI_DMAReceiveCplt()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))

stm32f4xx_hal_spi.c:2822

SPI_DMAReceiveCplt()

__HAL_SPI_CLEAR_CRCERRFLAG(hspi);

stm32f4xx_hal_spi.c:2825

SPI_DMAReceiveCplt()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);

stm32f4xx_hal_spi.c:2869

SPI_DMATransmitReceiveCplt()

tmpreg = READ_REG(hspi->Instance->DR);

stm32f4xx_hal_spi.c:2881

SPI_DMATransmitReceiveCplt()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:2894

SPI_DMATransmitReceiveCplt()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR))

stm32f4xx_hal_spi.c:2902

SPI_DMATransmitReceiveCplt()

__HAL_SPI_CLEAR_CRCERRFLAG(hspi);

stm32f4xx_hal_spi.c:2905

SPI_DMATransmitReceiveCplt()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN | SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:2993

SPI_DMAError()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);

stm32f4xx_hal_spi.c:3042

SPI_DMATxAbortCallback()

} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);

stm32f4xx_hal_spi.c:3053

SPI_DMATxAbortCallback()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:3076

SPI_DMATxAbortCallback()

__HAL_SPI_CLEAR_FREFLAG(hspi);

stm32f4xx_hal_spi.c:3077

SPI_DMATxAbortCallback()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:3103

SPI_DMARxAbortCallback()

CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);

stm32f4xx_hal_spi.c:3108

SPI_DMARxAbortCallback()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:3137

SPI_DMARxAbortCallback()

__HAL_SPI_CLEAR_FREFLAG(hspi);

stm32f4xx_hal_spi.c:3138

SPI_DMARxAbortCallback()

*hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR);

stm32f4xx_hal_spi.c:3160

SPI_2linesRxISR_8BIT()

__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:3176

SPI_2linesRxISR_8BIT()

ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;

stm32f4xx_hal_spi.c:3198

SPI_2linesRxISR_8BITCRC()

__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:3205

SPI_2linesRxISR_8BITCRC()

*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:3222

SPI_2linesTxISR_8BIT()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:3233

SPI_2linesTxISR_8BIT()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);

stm32f4xx_hal_spi.c:3235

SPI_2linesTxISR_8BIT()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);

stm32f4xx_hal_spi.c:3241

SPI_2linesTxISR_8BIT()

*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);

stm32f4xx_hal_spi.c:3259

SPI_2linesRxISR_16BIT()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);

stm32f4xx_hal_spi.c:3274

SPI_2linesRxISR_16BIT()

tmpreg = READ_REG(hspi->Instance->DR);

stm32f4xx_hal_spi.c:3295

SPI_2linesRxISR_16BITCRC()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);

stm32f4xx_hal_spi.c:3300

SPI_2linesRxISR_16BITCRC()

hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:3315

SPI_2linesTxISR_16BIT()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:3326

SPI_2linesTxISR_16BIT()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);

stm32f4xx_hal_spi.c:3328

SPI_2linesTxISR_16BIT()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);

stm32f4xx_hal_spi.c:3334

SPI_2linesTxISR_16BIT()

ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;

stm32f4xx_hal_spi.c:3356

SPI_RxISR_8BITCRC()

*hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR);

stm32f4xx_hal_spi.c:3374

SPI_RxISR_8BIT()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:3382

SPI_RxISR_8BIT()

tmpreg = READ_REG(hspi->Instance->DR);

stm32f4xx_hal_spi.c:3411

SPI_RxISR_16BITCRC()

__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:3416

SPI_RxISR_16BITCRC()

*((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);

stm32f4xx_hal_spi.c:3430

SPI_RxISR_16BIT()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:3438

SPI_RxISR_16BIT()

*(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:3463

SPI_TxISR_8BIT()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:3473

SPI_TxISR_8BIT()

hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);

stm32f4xx_hal_spi.c:3489

SPI_TxISR_16BIT()

SET_BIT(hspi->Instance->CR1, SPI_CR1_CRCNEXT);

stm32f4xx_hal_spi.c:3499

SPI_TxISR_16BIT()

while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)

stm32f4xx_hal_spi.c:3530

SPI_WaitFlagStateUntilTimeout()

__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:3541

SPI_WaitFlagStateUntilTimeout()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:3547

SPI_WaitFlagStateUntilTimeout()

SPI_RESET_CRC(hspi);

stm32f4xx_hal_spi.c:3553

SPI_WaitFlagStateUntilTimeout()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:3589

SPI_EndRxTransaction()

} while (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_BSY) != RESET);

stm32f4xx_hal_spi.c:3668

SPI_EndRxTxTransaction()

__HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);

stm32f4xx_hal_spi.c:3689

SPI_CloseRxTx_ISR()

} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);

stm32f4xx_hal_spi.c:3700

SPI_CloseRxTx_ISR()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:3711

SPI_CloseRxTx_ISR()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)

stm32f4xx_hal_spi.c:3716

SPI_CloseRxTx_ISR()

__HAL_SPI_CLEAR_CRCERRFLAG(hspi);

stm32f4xx_hal_spi.c:3720

SPI_CloseRxTx_ISR()

__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:3778

SPI_CloseRx_ISR()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:3789

SPI_CloseRx_ISR()

if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)

stm32f4xx_hal_spi.c:3795

SPI_CloseRx_ISR()

__HAL_SPI_CLEAR_CRCERRFLAG(hspi);

stm32f4xx_hal_spi.c:3798

SPI_CloseRx_ISR()

} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);

stm32f4xx_hal_spi.c:3855

SPI_CloseTx_ISR()

__HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));

stm32f4xx_hal_spi.c:3858

SPI_CloseTx_ISR()

__HAL_SPI_CLEAR_OVRFLAG(hspi);

stm32f4xx_hal_spi.c:3869

SPI_CloseTx_ISR()

} while ((hspi->Instance->SR & SPI_FLAG_TXE) == RESET);

stm32f4xx_hal_spi.c:3913

SPI_AbortRx_ISR()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:3916

SPI_AbortRx_ISR()

CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE | SPI_CR2_RXNEIE | SPI_CR2_ERRIE));

stm32f4xx_hal_spi.c:3919

SPI_AbortRx_ISR()

tmpreg = READ_REG(hspi->Instance->DR);

stm32f4xx_hal_spi.c:3922

SPI_AbortRx_ISR()

CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE));

stm32f4xx_hal_spi.c:3938

SPI_AbortTx_ISR()

__HAL_SPI_DISABLE(hspi);

stm32f4xx_hal_spi.c:3941

SPI_AbortTx_ISR()

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__SPI_HandleTypeDef::Instance is read by 43 functions:

__SPI_HandleTypeDef::Instance

HAL_SPI_TransmitReceive()

HAL_SPI_Transmit_IT()

HAL_SPI_Receive_IT()

HAL_SPI_TransmitReceive_IT()

HAL_SPI_Transmit_DMA()

HAL_SPI_Receive_DMA()

HAL_SPI_TransmitReceive_DMA()

SPI_DMATransmitCplt()

SPI_DMAReceiveCplt()

SPI_DMATransmitReceiveCplt()

SPI_DMAError()

SPI_DMATxAbortCallback()

SPI_DMARxAbortCallback()

SPI_2linesRxISR_8BIT()

SPI_2linesRxISR_8BITCRC()

SPI_2linesTxISR_8BIT()

SPI_2linesRxISR_16BIT()

SPI_2linesRxISR_16BITCRC()

SPI_2linesTxISR_16BIT()

SPI_WaitFlagStateUntilTimeout()

SPI_EndRxTransaction()

SPI_EndRxTxTransaction()

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__SPI_HandleTypeDef::Instance field

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