FMC_SDRAM_TimingTypeDef::RowCycleDelay field

Defines the delay between the Refresh command and the Activate command and the delay between two consecutive Refresh commands in number of memory clock cycles. This parameter can be a value between Min_Data = 1 and Max_Data = 16

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Declaration

from stm32f4xx_ll_fmc.h:482

uint32_t RowCycleDelay;

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FMC_SDRAM_TimingTypeDef::RowCycleDelay is referenced by 10 libraries and example projects:

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FMC_SDRAM_TimingTypeDef::RowCycleDelay field

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