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SourceVuSTM32 Libraries and SamplesHALFMC_SDRAM_TimingTypeDef::RowCycleDelay

FMC_SDRAM_TimingTypeDef::RowCycleDelay field

Defines the delay between the Refresh command and the Activate command and the delay between two consecutive Refresh commands in number of memory clock cycles. This parameter can be a value between Min_Data = 1 and Max_Data = 16

Syntax

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Summary

Declaration

from stm32f4xx_ll_fmc.h:482

uint32_t RowCycleDelay;

Examples

FMC_SDRAM_TimingTypeDef::RowCycleDelay is referenced by 10 libraries and example projects:

Drivers

Boards

Examples

STM32446E_EVAL

Examples

FMC

FMC_SDRAM

STM32469I-Discovery

Examples

FMC

FMC_SDRAM

STM32469I_EVAL

Examples

FMC

FMC_SDRAM

STM324x9I_EVAL

Examples

FMC

FMC_SDRAM

STM32F429I-Discovery

Examples

FMC

FMC_SDRAM

References

from 0/10 examples

Code

Location

Referrer

uint32_t RowCycleDelay; /*!< Defines the delay between the Refresh command and the Activate command

stm32f4xx_ll_fmc.h:482

assert_param(IS_FMC_ROWCYCLE_DELAY(Timing->RowCycleDelay));

stm32f4xx_ll_fmc.c:1251

FMC_SDRAM_Timing_Init()

(((Timing->RowCycleDelay) - 1U) << FMC_SDTR1_TRC_Pos) |

stm32f4xx_ll_fmc.c:1265

FMC_SDRAM_Timing_Init()

(((Timing->RowCycleDelay) - 1U) << FMC_SDTR1_TRC_Pos) |

stm32f4xx_ll_fmc.c:1275

FMC_SDRAM_Timing_Init()

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Data Use

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FMC_SDRAM_TimingTypeDef::RowCycleDelay is read by 1 function:

FMC_SDRAM_TimingTypeDef::RowCycleDelay

FMC_SDRAM_Timing_Init()

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