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SourceVuSTM32 Libraries and SamplesHALFMC_SDRAM_TimingTypeDef::RCDDelay

FMC_SDRAM_TimingTypeDef::RCDDelay field

Defines the delay between the Activate Command and a Read/Write command in number of memory clock cycles. This parameter can be a value between Min_Data = 1 and Max_Data = 16

Syntax

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Summary

Declaration

from stm32f4xx_ll_fmc.h:494

uint32_t RCDDelay;

Examples

FMC_SDRAM_TimingTypeDef::RCDDelay is referenced by 10 libraries and example projects:

Drivers

Boards

Examples

STM32446E_EVAL

Examples

FMC

FMC_SDRAM

STM32469I-Discovery

Examples

FMC

FMC_SDRAM

STM32469I_EVAL

Examples

FMC

FMC_SDRAM

STM324x9I_EVAL

Examples

FMC

FMC_SDRAM

STM32F429I-Discovery

Examples

FMC

FMC_SDRAM

References

from 0/10 examples

Code

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uint32_t RCDDelay; /*!< Defines the delay between the Activate Command and a Read/Write

stm32f4xx_ll_fmc.h:494

assert_param(IS_FMC_RCD_DELAY(Timing->RCDDelay));

stm32f4xx_ll_fmc.c:1254

FMC_SDRAM_Timing_Init()

(((Timing->RCDDelay) - 1U) << FMC_SDTR1_TRCD_Pos)));

stm32f4xx_ll_fmc.c:1268

FMC_SDRAM_Timing_Init()

(((Timing->RCDDelay) - 1U) << FMC_SDTR1_TRCD_Pos)));

stm32f4xx_ll_fmc.c:1284

FMC_SDRAM_Timing_Init()

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Data Use

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FMC_SDRAM_TimingTypeDef::RCDDelay is read by 1 function:

FMC_SDRAM_TimingTypeDef::RCDDelay

FMC_SDRAM_Timing_Init()

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