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__HAL_RCC_TIM2_CLK_ENABLE macro
Enable or disable the Low Speed APB (APB1) peripheral clock.
Syntax
#define __HAL_RCC_TIM2_CLK_ENABLE() do { \
__IO uint32_t tmpreg = 0x00U; \
SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
\
tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM2EN);\
UNUSED(tmpreg); \
} while(0U)
Notes
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.