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RCC_TypeDef::APB1LPENR
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STM32 Libraries and Samples
CMSIS
RCC_TypeDef::APB1LPENR
RCC_TypeDef::APB1LPENR field
RCC APB1 peripheral clock enable in low power mode register, Address offset: 0x60
Syntax
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Declaration
from
stm32f446xx.h:574
__IO
uint32_t
APB1LPENR
;
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RCC_TypeDef::APB1LPENR
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