ARM_MPU_RASR macro

MPU Region Attribute and Size Register Value

Syntax

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Summary

Declaration

from mpu_armv7.h:123

#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \ ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)

Arguments

Argument

Description

DisableExec

Instruction access disable bit, 1= disable instruction fetches.

AccessPermission

Data access permissions, allows you to configure read/write access for User and Privileged mode.

TypeExtField

Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.

IsShareable

Region is shareable between multiple bus masters.

IsCacheable

Region is cacheable, i.e. its value may be kept in cache.

IsBufferable

Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.

SubRegionDisable

Sub-region disable field.

Size

Region size of the region to be configured, for example 4K, 8K.

Examples

References

from examples

ARM_MPU_RASR macro

Syntax

Arguments

Examples

References

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