/** * Copyright (c) 2024 Raspberry Pi (Trading) Ltd. * * SPDX-License-Identifier: BSD-3-Clause *//* ... */#ifndef_HARDWARE_STRUCTS_USB_DPRAM_H#define_HARDWARE_STRUCTS_USB_DPRAM_H#include"hardware/address_mapped.h"#include"hardware/regs/usb.h"// Reference to datasheet: https://datasheets.raspberrypi.com/rp2350/rp2350-datasheet.pdf#tab-registerlist_usb//// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)// _REG_(x) will link to the corresponding register in hardware/regs/usb.h.//// Bit-field descriptions are of the form:// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION// 0-15#defineUSB_NUM_ENDPOINTS16// allow user to restrict number of endpoints available to save RAN#ifndefUSB_MAX_ENDPOINTS#defineUSB_MAX_ENDPOINTSUSB_NUM_ENDPOINTS#endif// 1-15#defineUSB_HOST_INTERRUPT_ENDPOINTS(USB_NUM_ENDPOINTS-1)// Endpoint buffer control bits#defineUSB_BUF_CTRL_FULL0x00008000u#defineUSB_BUF_CTRL_LAST0x00004000u#defineUSB_BUF_CTRL_DATA0_PID0x00000000u#defineUSB_BUF_CTRL_DATA1_PID0x00002000u#defineUSB_BUF_CTRL_SEL0x00001000u#defineUSB_BUF_CTRL_STALL0x00000800u#defineUSB_BUF_CTRL_AVAIL0x00000400u#defineUSB_BUF_CTRL_LEN_MASK0x000003FFu#defineUSB_BUF_CTRL_LEN_LSB0// ep_inout_ctrl bits#defineEP_CTRL_ENABLE_BITS(1u<<31u)#defineEP_CTRL_DOUBLE_BUFFERED_BITS(1u<<30)#defineEP_CTRL_INTERRUPT_PER_BUFFER(1u<<29)#defineEP_CTRL_INTERRUPT_PER_DOUBLE_BUFFER(1u<<28)#defineEP_CTRL_INTERRUPT_ON_NAK(1u<<16)#defineEP_CTRL_INTERRUPT_ON_STALL(1u<<17)#defineEP_CTRL_BUFFER_TYPE_LSB26u#defineEP_CTRL_HOST_INTERRUPT_INTERVAL_LSB16u#defineUSB_DPRAM_SIZE4096u19 defines// PICO_CONFIG: USB_DPRAM_MAX, Set amount of USB RAM used by USB system, min=0, max=4096, default=4096, group=hardware_usb// Allow user to claim some of the USB RAM for themselves#ifndefUSB_DPRAM_MAX#defineUSB_DPRAM_MAXUSB_DPRAM_SIZE#endif// Define maximum packet sizes#defineUSB_MAX_ISO_PACKET_SIZE1023#defineUSB_MAX_PACKET_SIZE64typedefstruct{// 4K of DPSRAM at beginning. Note this supports 8, 16, and 32 bit accessesvolatileuint8_tsetup_packet[8];// First 8 bytes are always for setup packets// Starts at ep1structusb_device_dpram_ep_ctrl{io_rw_32in;io_rw_32out;...}ep_ctrl[USB_NUM_ENDPOINTS-1];// Starts at ep0structusb_device_dpram_ep_buf_ctrl{io_rw_32in;io_rw_32out;...}ep_buf_ctrl[USB_NUM_ENDPOINTS];// EP0 buffers are fixed. Assumes single buffered mode for EP0uint8_tep0_buf_a[0x40];uint8_tep0_buf_b[0x40];// Rest of DPRAM can be carved up as neededuint8_tepx_data[USB_DPRAM_MAX-0x180];...}usb_device_dpram_t;static_assert(sizeof(usb_device_dpram_t)==USB_DPRAM_MAX,"");static_assert(offsetof(usb_device_dpram_t,epx_data)==0x180,"");typedefstruct{// 4K of DPSRAM at beginning. Note this supports 8, 16, and 32 bit accessesvolatileuint8_tsetup_packet[8];// First 8 bytes are always for setup packets// Interrupt endpoint control 1 -> 15structusb_host_dpram_ep_ctrl{io_rw_32ctrl;io_rw_32spare;...}int_ep_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];io_rw_32epx_buf_ctrl;io_rw_32_spare0;// Interrupt endpoint buffer controlstructusb_host_dpram_ep_buf_ctrl{io_rw_32ctrl;io_rw_32spare;...}int_ep_buffer_ctrl[USB_HOST_INTERRUPT_ENDPOINTS];io_rw_32epx_ctrl;uint8_t_spare1[124];// Should start at 0x180uint8_tepx_data[USB_DPRAM_MAX-0x180];...}usb_host_dpram_t;static_assert(sizeof(usb_host_dpram_t)==USB_DPRAM_MAX,"");static_assert(offsetof(usb_host_dpram_t,epx_data)==0x180,"");#defineusb_dpram((usb_device_dpram_t*)USBCTRL_DPRAM_BASE)#defineusbh_dpram((usb_host_dpram_t*)USBCTRL_DPRAM_BASE)static_assert(USB_HOST_INTERRUPT_ENDPOINTS==15,"");/* ... */#endif// _HARDWARE_STRUCTS_USB_DPRAM_H
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