Symbols
loading (1/5)...
Files
loading (3/5)...

static_ip sample sample

static_ip sample is a sample project defining the following symbols:

Most used functions

Name
Location
Summary
write value to ch390 internal register
read value from ch390 internal register
SPI operation wrapper for bitwise clearing ENC28J60 internal register
SPI operation wrapper for bitwise setting ENC28J60 internal register
SPI operation wrapper for reading ENC28J60 internal register
start ch390: enable interrupt and start receive
stop ch390: disable interrupt and stop receive
read buffer from ch390 internal memory
ERXRDPT need to be set always at odd addresses
SPI operation wrapper for writing ENC28J60 internal memory
Returns the device type of the ethernet handle
read mac address from internal registers
set new mac address to internal registers
write buffer to ch390 internal memory
software reset ch390 internal register
default setup for ch390 internal registers
Create CH390 Ethernet MAC instance
Create a PHY instance of CH390
Calculate wrap around when reading beyond the end of the RX buffer
SPI operation wrapper for writing ENC28J60 internal register
SPI operation wrapper for reading ENC28J60 internal memory
SPI operation wrapper for resetting ENC28J60
Create ENC28J60 Ethernet MAC instance
Start enc28j60: enable interrupt and start receive
Stop enc28j60: disable interrupt and stop receiving packets
Main ENC28J60 Task. Mainly used for Rx processing. However, it also handles other interrupts.
Write ENC28J60 internal PHY register
Read ENC28J60 internal PHY register
Write mac address to internal registers
Default setup for ENC28J60 internal registers
Deinitialize Ethernet driver
Initialize Ethernet driver based on Espressif IoT Development Framework Configuration
Custom functions implementations**********
Compute amount of SPI bit-cycles the CS should stay active after the transmission to meet ENC28J60 CS Hold Time specification.

Other commonly used symbols

Name
Location
Summary
CH390 specific configuration
Custom SPI driver definitions
Shared Registers in ENC28J60 (accessible on each bank)
______ |__TX__| TX: 2 KB : [0x1800, 0x2000) | | | RX | RX: 6 KB : [0x0000, 0x1800) |______|
ENC28J60 specific configuration
SPI device configuration (this field is invalid when custom SPI driver is defined)
SPI device configuration
Vendor Specific Register************** PHCON2(PHY Control Register 2)
PHCON2(PHY Control Register 2)
PHSTAT2(PHY Status Register 2)
Vendor Specific Register**************
status and flag of ENC28J60 specific registers
Register definition
Interrupt GPIO number
Period in ms to poll rx status when interrupt mode is not used
SPI peripheral (this field is invalid when custom SPI driver is defined)
Interrupt GPIO number
Per-bank Registers in ENC28J60
Get status if PLCA is disabled or enabled
Set PLCA Transmit Opportunity Timer in incriments of 100ns
Get PLCA Transmit Opportunity Timer in incriments of 100ns
Add additional transmit opportunity for chosen node
Remove additional transmit opportunity for chosen node
Set max count of additional packets, set to 0 to disable
Get max count of additional packets, set to 0 to disable
Set time after transmission during which node is allowed to transmit more packets in incriments of 100ns
Get time after transmission during which node is allowed to transmit more packets in incriments of 100ns
Organizationally Unique Identifier(OUI) bits 3 to 10
Organizationally Unique Identifier(OUI) bits 11 to 18
Organizationally Unique Identifier(OUI) bits 19 to 24
Default CH390 specific configuration
Default ENC28J60 specific configuration

Dependencies