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SourceVuESP-IDF Framework and ExamplesESP-IDFtimg_wdtconfig0_reg_t::::wdt_stg3

timg_wdtconfig0_reg_t::::wdt_stg3 field

wdt_stg3 : R/W; bitpos: [24:23]; default: 0; Stage 3 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.

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Declaration

from timer_group_struct.h:217

uint32_t wdt_stg3: 2;

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uint32_t wdt_stg3: 2;

timer_group_struct.h:217

hw->wdtconfig0.wdt_stg3 = behavior;

mwdt_ll_config_stage()

hw->wdtconfig0.wdt_stg3 = WDT_STAGE_ACTION_OFF;

mwdt_ll_disable_stage()

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Data Use

timg_wdtconfig0_reg_t::::wdt_stg3 is written by 2 functions:

mwdt_ll_config_stage()

mwdt_ll_disable_stage()

timg_wdtconfig0_reg_t::::wdt_stg3

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