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SourceVuESP-IDF Framework and ExamplesESP-IDFtimg_wdtconfig0_reg_t::::wdt_stg1

timg_wdtconfig0_reg_t::::wdt_stg1 field

wdt_stg1 : R/W; bitpos: [28:27]; default: 0; Stage 1 configuration. 0: off, 1: interrupt, 2: reset CPU, 3: reset system.

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Declaration

from timer_group_struct.h:227

uint32_t wdt_stg1: 2;

References

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Referrer

uint32_t wdt_stg1: 2;

timer_group_struct.h:227

hw->wdtconfig0.wdt_stg1 = behavior;

mwdt_ll_config_stage()

hw->wdtconfig0.wdt_stg1 = WDT_STAGE_ACTION_OFF;

mwdt_ll_disable_stage()

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Data Use

timg_wdtconfig0_reg_t::::wdt_stg1 is written by 2 functions:

mwdt_ll_config_stage()

mwdt_ll_disable_stage()

timg_wdtconfig0_reg_t::::wdt_stg1

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