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SourceVuESP-IDF Framework and ExamplesESP-IDFtimg_txconfig_reg_t::::tx_divider

timg_txconfig_reg_t::::tx_divider field

tx_divider : R/W; bitpos: [28:13]; default: 1; Timer x clock (Tx_clk) prescaler value.

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Declaration

from timer_group_struct.h:37

uint32_t tx_divider: 16;

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uint32_t tx_divider: 16;

timer_group_struct.h:37

HAL_FORCE_MODIFY_U32_REG_FIELD(hw->hw_timer[timer_num].config, tx_divider, divider);

timer_ll_set_clock_prescale()

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Data Use

timg_txconfig_reg_t::::tx_divider is written by 1 function:

timer_ll_set_clock_prescale()

timg_txconfig_reg_t::::tx_divider

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