spi_dev_s::::::int_hold_ena field

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from spi_struct.h:361

uint32_t int_hold_ena: 2;

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uint32_t int_hold_ena: 2; /*This register is for two SPI masters to share the same cs clock and data signals. The bits of one SPI are set if the other SPI is busy the SPI will be hold. 1(3): hold at ,idle, phase 2: hold at ,prepare, phase.*/

spi_struct.h:361

spi_dev_s::::::int_hold_ena field

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