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SourceVuESP-IDF Framework and ExamplesESP-IDFs_host_ctx

s_host_ctx variable

Syntax

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Summary

Declaration

from sdmmc_host.c:99

static host_ctx_t s_host_ctx = {.active_slot_num = -1};

References

Code

Location

Referrer

static host_ctx_t s_host_ctx = {.active_slot_num = -1};

sdmmc_host.c:99

sdmmc_ll_reset_controller(s_host_ctx.hal.dev);

sdmmc_host.c:114

s_module_reset()

sdmmc_ll_reset_dma(s_host_ctx.hal.dev);

sdmmc_host.c:115

s_module_reset()

sdmmc_ll_reset_fifo(s_host_ctx.hal.dev);

sdmmc_host.c:116

s_module_reset()

bool is_done = sdmmc_ll_is_controller_reset_done(s_host_ctx.hal.dev) && sdmmc_ll_is_dma_reset_done(s_host_ctx.hal.dev) && sdmmc_ll_is_fifo_reset_done(s_host_ctx.hal.dev);

sdmmc_host.c:121

s_is_module_reset_done()

sdmmc_ll_set_clock_div(s_host_ctx.hal.dev, div);

sdmmc_host.c:175

sdmmc_host_set_clk_div()

sdmmc_ll_select_clk_source(s_host_ctx.hal.dev, src);

sdmmc_host.c:176

sdmmc_host_set_clk_div()

sdmmc_ll_init_phase_delay(s_host_ctx.hal.dev);

sdmmc_host.c:177

sdmmc_host_set_clk_div()

s_host_ctx.clk_src = clk_src;

sdmmc_host.c:217

sdmmc_host_get_clk_dividers()

sdmmc_ll_set_data_timeout(s_host_ctx.hal.dev, data_timeout_cycles);

sdmmc_host.c:283

sdmmc_host_set_data_timeout()

sdmmc_ll_enable_card_clock(s_host_ctx.hal.dev, slot, false);

sdmmc_host.c:291

sdmmc_host_set_card_clk()

sdmmc_ll_set_card_clock_div(s_host_ctx.hal.dev, slot, card_div);

sdmmc_host.c:308

sdmmc_host_set_card_clk()

sdmmc_ll_enable_card_clock(s_host_ctx.hal.dev, slot, true);

sdmmc_host.c:318

sdmmc_host_set_card_clk()

sdmmc_ll_enable_card_clock_low_power(s_host_ctx.hal.dev, slot, true);

sdmmc_host.c:319

sdmmc_host_set_card_clk()

sdmmc_ll_set_response_timeout(s_host_ctx.hal.dev, 255);

sdmmc_host.c:329

sdmmc_host_set_card_clk()

s_host_ctx.slot_ctx[slot].slot_freq_khz = freq_khz;

sdmmc_host.c:332

sdmmc_host_set_card_clk()

s_host_ctx.slot_ctx[slot].slot_host_div = host_div;

sdmmc_host.c:334

sdmmc_host_set_card_clk()

int host_div = sdmmc_ll_get_clock_div(s_host_ctx.hal.dev);

sdmmc_host.c:347

sdmmc_host_get_real_freq()

int card_div = sdmmc_ll_get_card_clock_div(s_host_ctx.hal.dev, slot);

sdmmc_host.c:348

sdmmc_host_get_real_freq()

*real_freq_khz = sdmmc_host_calc_freq(s_host_ctx.clk_src, host_div, card_div);

sdmmc_host.c:349

sdmmc_host_get_real_freq()

if (s_host_ctx.active_slot_num != slot) {

sdmmc_host.c:413

sdmmc_host_start_command()

s_host_ctx.active_slot_num = slot;

sdmmc_host.c:414

sdmmc_host_start_command()

if (!sdmmc_ll_is_card_detected(s_host_ctx.hal.dev, slot) && !cmd.update_clk_reg) {

sdmmc_host.c:424

sdmmc_host_start_command()

if (cmd.data_expected && cmd.rw && sdmmc_ll_is_card_write_protected(s_host_ctx.hal.dev, slot)) {

sdmmc_host.c:427

sdmmc_host_start_command()

while (!(sdmmc_ll_is_command_taken(s_host_ctx.hal.dev))) {

sdmmc_host.c:438

sdmmc_host_start_command()

sdmmc_ll_set_command_arg(s_host_ctx.hal.dev, arg);

sdmmc_host.c:449

sdmmc_host_start_command()

sdmmc_ll_set_command(s_host_ctx.hal.dev, cmd);

sdmmc_host.c:452

sdmmc_host_start_command()

while (!(sdmmc_ll_is_command_taken(s_host_ctx.hal.dev))) {

sdmmc_host.c:454

sdmmc_host_start_command()

sdmmc_ll_clear_interrupt(s_host_ctx.hal.dev, 0xffffffff);

sdmmc_host.c:469

sdmmc_host_intmask_clear_disable()

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, 0xffffffff, false);

sdmmc_host.c:470

sdmmc_host_intmask_clear_disable()

sdmmc_ll_enable_global_interrupt(s_host_ctx.hal.dev, false);

sdmmc_host.c:471

sdmmc_host_intmask_clear_disable()

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, 0xffffffff, false);

sdmmc_host.c:476

sdmmc_host_intmask_set_enable()

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, SDMMC_LL_EVENT_DEFAULT, true);

sdmmc_host.c:477

sdmmc_host_intmask_set_enable()

sdmmc_ll_enable_global_interrupt(s_host_ctx.hal.dev, true);

sdmmc_host.c:478

sdmmc_host_intmask_set_enable()

if (s_host_ctx.intr_handle) {

sdmmc_host.c:483

sdmmc_host_init()

sdmmc_ll_enable_bus_clock(s_host_ctx.hal.dev, true);

sdmmc_host.c:490

sdmmc_host_init()

sdmmc_ll_reset_register(s_host_ctx.hal.dev);

sdmmc_host.c:491

sdmmc_host_init()

sdmmc_hal_init(&s_host_ctx.hal);

sdmmc_host.c:495

sdmmc_host_init()

ESP_LOGD(TAG, "peripheral version %"PRIx32", hardware config %08"PRIx32, sdmmc_ll_get_version_id(s_host_ctx.hal.dev), sdmmc_ll_get_hw_config_info(s_host_ctx.hal.dev));

sdmmc_host.c:507

sdmmc_host_init()

s_host_ctx.event_queue = xQueueCreate(SDMMC_EVENT_QUEUE_LENGTH, sizeof(sdmmc_event_t));

sdmmc_host.c:513

sdmmc_host_init()

if (!s_host_ctx.event_queue) {

sdmmc_host.c:514

sdmmc_host_init()

s_host_ctx.io_intr_event = xSemaphoreCreateBinary();

sdmmc_host.c:517

sdmmc_host_init()

if (!s_host_ctx.io_intr_event) {

sdmmc_host.c:518

sdmmc_host_init()

vQueueDelete(s_host_ctx.event_queue);

sdmmc_host.c:519

sdmmc_host_init()

s_host_ctx.event_queue = NULL;

sdmmc_host.c:520

sdmmc_host_init()

esp_err_t ret = esp_intr_alloc(ETS_SDIO_HOST_INTR_SOURCE, 0, &sdmmc_isr, s_host_ctx.event_queue, &s_host_ctx.intr_handle);

sdmmc_host.c:524

sdmmc_host_init()

vQueueDelete(s_host_ctx.event_queue);

sdmmc_host.c:526

sdmmc_host_init()

s_host_ctx.event_queue = NULL;

sdmmc_host.c:527

sdmmc_host_init()

vSemaphoreDelete(s_host_ctx.io_intr_event);

sdmmc_host.c:528

sdmmc_host_init()

s_host_ctx.io_intr_event = NULL;

sdmmc_host.c:529

sdmmc_host_init()

sdmmc_ll_enable_busy_clear_interrupt(s_host_ctx.hal.dev, false);

sdmmc_host.c:536

sdmmc_host_init()

sdmmc_ll_init_dma(s_host_ctx.hal.dev);

sdmmc_host.c:539

sdmmc_host_init()

vQueueDelete(s_host_ctx.event_queue);

sdmmc_host.c:544

sdmmc_host_init()

s_host_ctx.event_queue = NULL;

sdmmc_host.c:545

sdmmc_host_init()

vSemaphoreDelete(s_host_ctx.io_intr_event);

sdmmc_host.c:546

sdmmc_host_init()

s_host_ctx.io_intr_event = NULL;

sdmmc_host.c:547

sdmmc_host_init()

esp_intr_free(s_host_ctx.intr_handle);

sdmmc_host.c:548

sdmmc_host_init()

s_host_ctx.intr_handle = NULL;

sdmmc_host.c:549

sdmmc_host_init()

if (s_host_ctx.slot_ctx[slot].slot_id != slot) {

sdmmc_host.c:608

sdmmc_host_is_slot_set_to_uhs1()

*is_uhs1 = s_host_ctx.slot_ctx[slot].is_uhs1;

sdmmc_host.c:613

sdmmc_host_is_slot_set_to_uhs1()

if (!s_host_ctx.intr_handle) {

sdmmc_host.c:620

sdmmc_host_init_slot()

s_host_ctx.slot_ctx[slot].is_uhs1 = true;

sdmmc_host.c:631

sdmmc_host_init_slot()

sdmmc_slot_io_info_t *slot_gpio = &s_host_ctx.slot_ctx[slot].slot_gpio_num;

sdmmc_host.c:641

sdmmc_host_init_slot()

s_host_ctx.slot_ctx[slot].slot_width = slot_width;

sdmmc_host.c:648

sdmmc_host_init_slot()

s_host_ctx.slot_ctx[slot].use_gpio_matrix = use_gpio_matrix;

sdmmc_host.c:675

sdmmc_host_init_slot()

sdmmc_host_pullup_en_internal(slot, s_host_ctx.slot_ctx[slot].slot_width);

sdmmc_host.c:714

sdmmc_host_init_slot()

if (s_host_ctx.slot_ctx[slot].is_uhs1) {

sdmmc_host.c:741

sdmmc_host_init_slot()

s_host_ctx.slot_ctx[slot].slot_id = slot;

sdmmc_host.c:811

sdmmc_host_init_slot()

if (s_host_ctx.num_of_init_slots < SOC_SDMMC_NUM_SLOTS && s_host_ctx.active_slot_num != slot) {

sdmmc_host.c:814

sdmmc_host_init_slot()

s_host_ctx.num_of_init_slots += 1;

sdmmc_host.c:815

sdmmc_host_init_slot()

s_host_ctx.active_slot_num = slot;

sdmmc_host.c:817

sdmmc_host_init_slot()

esp_intr_free(s_host_ctx.intr_handle);

sdmmc_host.c:824

sdmmc_host_deinit_internal()

s_host_ctx.intr_handle = NULL;

sdmmc_host.c:825

sdmmc_host_deinit_internal()

vQueueDelete(s_host_ctx.event_queue);

sdmmc_host.c:826

sdmmc_host_deinit_internal()

s_host_ctx.event_queue = NULL;

sdmmc_host.c:827

sdmmc_host_deinit_internal()

vQueueDelete(s_host_ctx.io_intr_event);

sdmmc_host.c:828

sdmmc_host_deinit_internal()

s_host_ctx.io_intr_event = NULL;

sdmmc_host.c:829

sdmmc_host_deinit_internal()

sdmmc_ll_deinit_clk(s_host_ctx.hal.dev);

sdmmc_host.c:830

sdmmc_host_deinit_internal()

sdmmc_ll_enable_bus_clock(s_host_ctx.hal.dev, false);

sdmmc_host.c:834

sdmmc_host_deinit_internal()

s_host_ctx.active_slot_num = -1; // Reset the active slot number, will be set again before the next transaction

sdmmc_host.c:842

sdmmc_host_decrease_init_slot_num()

if (s_host_ctx.num_of_init_slots > 0) {

sdmmc_host.c:843

sdmmc_host_decrease_init_slot_num()

s_host_ctx.num_of_init_slots -= 1;

sdmmc_host.c:844

sdmmc_host_decrease_init_slot_num()

return s_host_ctx.num_of_init_slots;

sdmmc_host.c:846

sdmmc_host_decrease_init_slot_num()

sdmmc_slot_io_info_t* gpio = &s_host_ctx.slot_ctx[slot].slot_gpio_num;

sdmmc_host.c:855

sdmmc_host_deinit_slot_internal()

memset(&(s_host_ctx.slot_ctx[slot]), 0, sizeof(slot_ctx_t));

sdmmc_host.c:864

sdmmc_host_deinit_slot_internal()

if (!s_host_ctx.intr_handle) {

sdmmc_host.c:872

sdmmc_host_deinit_slot()

if (!s_host_ctx.intr_handle) {

sdmmc_host.c:889

sdmmc_host_deinit()

if (s_host_ctx.slot_ctx[slot].slot_host_div == 0) {

sdmmc_host.c:905

sdmmc_host_slot_initialized()

sdmmc_ll_set_clock_div(s_host_ctx.hal.dev, s_host_ctx.slot_ctx[slot].slot_host_div);

sdmmc_host.c:916

sdmmc_host_change_to_slot()

sdmmc_host_set_data_timeout(s_host_ctx.slot_ctx[slot].slot_freq_khz);

sdmmc_host.c:921

sdmmc_host_change_to_slot()

if (!s_host_ctx.event_queue) {

sdmmc_host.c:933

sdmmc_host_wait_for_event()

int ret = xQueueReceive(s_host_ctx.event_queue, out_event, tick_count);

sdmmc_host.c:936

sdmmc_host_wait_for_event()

sdmmc_ll_set_card_width(s_host_ctx.hal.dev, slot, SD_BUS_WIDTH_1_BIT);

sdmmc_host.c:951

sdmmc_host_set_bus_width()

sdmmc_ll_set_card_width(s_host_ctx.hal.dev, slot, SD_BUS_WIDTH_4_BIT);

sdmmc_host.c:953

sdmmc_host_set_bus_width()

configure_pin(s_host_ctx.slot_ctx[slot].slot_gpio_num.d3, sdmmc_slot_gpio_sig[slot].d3, GPIO_MODE_INPUT_OUTPUT, "d3", s_host_ctx.slot_ctx[slot].use_gpio_matrix);

sdmmc_host.c:955

sdmmc_host_set_bus_width()

sdmmc_ll_set_card_width(s_host_ctx.hal.dev, slot, SD_BUS_WIDTH_8_BIT);

sdmmc_host.c:957

sdmmc_host_set_bus_width()

configure_pin(s_host_ctx.slot_ctx[slot].slot_gpio_num.d3, sdmmc_slot_gpio_sig[slot].d3, GPIO_MODE_INPUT_OUTPUT, "d3", s_host_ctx.slot_ctx[slot].use_gpio_matrix);

sdmmc_host.c:959

sdmmc_host_set_bus_width()

return s_host_ctx.slot_ctx[slot].slot_width;

sdmmc_host.c:970

sdmmc_host_get_slot_width()

if (s_host_ctx.slot_ctx[slot].slot_width == 8 && ddr_enabled) {

sdmmc_host.c:977

sdmmc_host_set_bus_ddr_mode()

sdmmc_ll_enable_ddr_mode(s_host_ctx.hal.dev, slot, ddr_enabled);

sdmmc_host.c:983

sdmmc_host_set_bus_ddr_mode()

sdmmc_ll_enable_card_clock_low_power(s_host_ctx.hal.dev, slot, false);

sdmmc_host.c:994

sdmmc_host_set_cclk_always_on()

sdmmc_ll_enable_card_clock_low_power(s_host_ctx.hal.dev, slot, true);

sdmmc_host.c:996

sdmmc_host_set_cclk_always_on()

sdmmc_ll_enable_card_clock(s_host_ctx.hal.dev, slot, enable);

sdmmc_host.c:1004

sdmmc_host_enable_clk_cmd11()

sdmmc_ll_enable_1v8_mode(s_host_ctx.hal.dev, slot, enable);

sdmmc_host.c:1006

sdmmc_host_enable_clk_cmd11()

sdmmc_ll_stop_dma(s_host_ctx.hal.dev);

sdmmc_host.c:1011

sdmmc_host_dma_stop()

sdmmc_ll_set_data_transfer_len(s_host_ctx.hal.dev, data_size);

sdmmc_host.c:1017

sdmmc_host_dma_prepare()

sdmmc_ll_set_block_size(s_host_ctx.hal.dev, block_size);

sdmmc_host.c:1018

sdmmc_host_dma_prepare()

sdmmc_ll_set_desc_addr(s_host_ctx.hal.dev, (uint32_t)desc);

sdmmc_host.c:1019

sdmmc_host_dma_prepare()

sdmmc_ll_enable_dma(s_host_ctx.hal.dev, true);

sdmmc_host.c:1022

sdmmc_host_dma_prepare()

sdmmc_ll_poll_demand(s_host_ctx.hal.dev);

sdmmc_host.c:1028

sdmmc_host_dma_resume()

return sdmmc_ll_is_card_data_busy(s_host_ctx.hal.dev);

sdmmc_host.c:1033

sdmmc_host_card_busy()

configure_pin(s_host_ctx.slot_ctx[slot].slot_gpio_num.d1, sdmmc_slot_gpio_sig[slot].d1, GPIO_MODE_INPUT_OUTPUT, "d1", s_host_ctx.slot_ctx[slot].use_gpio_matrix);

sdmmc_host.c:1038

sdmmc_host_io_int_enable()

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, SDMMC_INTMASK_IO_SLOT0, false);

sdmmc_host.c:1055

sdmmc_host_io_int_wait()

sdmmc_ll_clear_interrupt(s_host_ctx.hal.dev, SDMMC_INTMASK_IO_SLOT0);

sdmmc_host.c:1056

sdmmc_host_io_int_wait()

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, SDMMC_INTMASK_IO_SLOT1, false);

sdmmc_host.c:1058

sdmmc_host_io_int_wait()

sdmmc_ll_clear_interrupt(s_host_ctx.hal.dev, SDMMC_INTMASK_IO_SLOT1);

sdmmc_host.c:1059

sdmmc_host_io_int_wait()

if (gpio_get_level(s_host_ctx.slot_ctx[slot].slot_gpio_num.d1) == 0) {

sdmmc_host.c:1062

sdmmc_host_io_int_wait()

xSemaphoreTake(s_host_ctx.io_intr_event, 0);

sdmmc_host.c:1068

sdmmc_host_io_int_wait()

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, SDMMC_INTMASK_IO_SLOT0, true);

sdmmc_host.c:1071

sdmmc_host_io_int_wait()

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, SDMMC_INTMASK_IO_SLOT1, true);

sdmmc_host.c:1073

sdmmc_host_io_int_wait()

if (xSemaphoreTake(s_host_ctx.io_intr_event, timeout_ticks) == pdTRUE) {

sdmmc_host.c:1076

sdmmc_host_io_int_wait()

uint32_t pending = sdmmc_ll_get_intr_status(s_host_ctx.hal.dev) & SDMMC_LL_SD_EVENT_MASK;

sdmmc_host.c:1105

sdmmc_ll_clear_interrupt(s_host_ctx.hal.dev, pending);

sdmmc_host.c:1106

uint32_t dma_pending = sdmmc_ll_get_idsts_interrupt_raw(s_host_ctx.hal.dev);

sdmmc_host.c:1109

sdmmc_ll_clear_idsts_interrupt(s_host_ctx.hal.dev, dma_pending);

sdmmc_host.c:1110

uint32_t sdio_pending = (sdmmc_ll_get_intr_status(s_host_ctx.hal.dev) & (SDMMC_INTMASK_IO_SLOT1 | SDMMC_INTMASK_IO_SLOT0));

sdmmc_host.c:1117

sdmmc_ll_enable_interrupt(s_host_ctx.hal.dev, sdio_pending, false);

sdmmc_host.c:1120

xSemaphoreGiveFromISR(s_host_ctx.io_intr_event, &higher_priority_task_awoken);

sdmmc_host.c:1121

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.cmd);

sdmmc_host.c:1136

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d0);

sdmmc_host.c:1137

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d1);

sdmmc_host.c:1139

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d2);

sdmmc_host.c:1140

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d3);

sdmmc_host.c:1141

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d4);

sdmmc_host.c:1144

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d5);

sdmmc_host.c:1145

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d6);

sdmmc_host.c:1146

sdmmc_host_pullup_en_internal()

gpio_pullup_en(s_host_ctx.slot_ctx[slot].slot_gpio_num.d7);

sdmmc_host.c:1147

sdmmc_host_pullup_en_internal()

if (s_host_ctx.intr_handle) {

sdmmc_host.c:1170

sdmmc_host_get_state()

state->num_of_init_slots = s_host_ctx.num_of_init_slots;

sdmmc_host.c:1178

sdmmc_host_get_state()

Call Tree

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Data Use

s_host_ctx is read by 35 functions:

s_host_ctx

s_module_reset()

s_is_module_reset_done()

sdmmc_host_set_clk_div()

sdmmc_host_get_clk_dividers()

sdmmc_host_set_data_timeout()

sdmmc_host_set_card_clk()

sdmmc_host_get_real_freq()

sdmmc_host_start_command()

sdmmc_host_intmask_clear_disable()

sdmmc_host_intmask_set_enable()

sdmmc_host_init()

sdmmc_host_is_slot_set_to_uhs1()

sdmmc_host_init_slot()

sdmmc_host_deinit_internal()

sdmmc_host_decrease_init_slot_num()

sdmmc_host_deinit_slot_internal()

sdmmc_host_deinit_slot()

sdmmc_host_deinit()

sdmmc_host_slot_initialized()

sdmmc_host_change_to_slot()

sdmmc_host_wait_for_event()

sdmmc_host_set_bus_width()

sdmmc_host_get_slot_width()

sdmmc_host_set_bus_ddr_mode()

sdmmc_host_set_cclk_always_on()

sdmmc_host_enable_clk_cmd11()

sdmmc_host_dma_stop()

sdmmc_host_dma_prepare()

sdmmc_host_dma_resume()

sdmmc_host_card_busy()

sdmmc_host_io_int_enable()

sdmmc_host_io_int_wait()

sdmmc_host_pullup_en_internal()

sdmmc_host_get_state()

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Implementations

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Instances

Lifecycle

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