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SourceVuESP-IDF Framework and ExamplesESP-IDFrtc_clk_config_s::clk_8m_div

rtc_clk_config_s::clk_8m_div field

Syntax

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Summary

Declaration

uint32_t clk_8m_div : 3;

References

Code

Location

Referrer

uint32_t clk_8m_div : 3; //!< RTC 8M clock divider (division is by clk_8m_div+1, i.e. 0 means 8MHz frequency)

rtc_clk_config_t clk_cfg = RTC_CLK_CONFIG_DEFAULT();

bootloader_clock_init.c:52

bootloader_clock_configure()

clk_ll_rc_fast_set_divider(cfg.clk_8m_div + 1);

rtc_clk_init.c:64

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Data Use

rtc_clk_config_s::clk_8m_div is read by 1 function:

rtc_clk_config_s::clk_8m_div

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