psram_ctx_t::regions_to_heap field

On other chips, only one region is needed. So for chips other than S2, size of `regions_to_heap[1]` and `mapped_regions[1]`will always be zero. If in the future, this condition is worse (dbus memory isn't consecutive), we need to delegate this context to chip-specific files, and only keep a (void *) pointer here pointing to those chip-specific contexts