p_i2s - syntax, references, description

References

Code

Location

Referrer

static i2s_obj_t *p_i2s[SOC_I2S_NUM] = {

ESP_RETURN_ON_ERROR(esp_intr_alloc(i2s_periph_signal[i2s_num].irq, intr_flag, i2s_intr_handler_default, p_i2s[i2s_num], &p_i2s[i2s_num]->i2s_isr_handle), TAG, "Register I2S Interrupt error");

i2s_legacy.c:391

i2s_dma_intr_init()

p_i2s[i2s_num]->tx->curr_ptr = NULL;

i2s_legacy.c:398

i2s_tx_reset()

p_i2s[i2s_num]->tx->rw_pos = 0;

i2s_legacy.c:399

i2s_tx_reset()

i2s_hal_tx_reset(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:400

i2s_tx_reset()

i2s_hal_tx_reset_dma(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:404

i2s_tx_reset()

i2s_hal_tx_reset_fifo(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:406

i2s_tx_reset()

p_i2s[i2s_num]->rx->curr_ptr = NULL;

i2s_legacy.c:416

i2s_rx_reset()

p_i2s[i2s_num]->rx->rw_pos = 0;

i2s_legacy.c:417

i2s_rx_reset()

i2s_hal_rx_reset(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:418

i2s_rx_reset()

i2s_hal_rx_reset_dma(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:422

i2s_rx_reset()

i2s_hal_rx_reset_fifo(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:424

i2s_rx_reset()

i2s_hal_tx_enable_dma(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:432

i2s_tx_start()

i2s_hal_tx_enable_intr(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:433

i2s_tx_start()

i2s_hal_tx_start_link(&(p_i2s[i2s_num]->hal), (uint32_t) p_i2s[i2s_num]->tx->desc[0]);

i2s_legacy.c:434

i2s_tx_start()

i2s_hal_tx_start(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:436

i2s_tx_start()

i2s_hal_rx_enable_dma(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:444

i2s_rx_start()

i2s_hal_rx_enable_intr(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:445

i2s_rx_start()

i2s_hal_rx_start_link(&(p_i2s[i2s_num]->hal), (uint32_t) p_i2s[i2s_num]->rx->desc[0]);

i2s_legacy.c:446

i2s_rx_start()

i2s_hal_rx_start(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:448

i2s_rx_start()

i2s_hal_tx_stop(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:453

i2s_tx_stop()

i2s_hal_tx_stop_link(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:457

i2s_tx_stop()

i2s_hal_tx_disable_intr(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:458

i2s_tx_stop()

i2s_hal_tx_disable_dma(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:459

i2s_tx_stop()

i2s_hal_rx_stop(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:465

i2s_rx_stop()

i2s_hal_rx_stop_link(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:469

i2s_rx_stop()

i2s_hal_rx_disable_intr(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:470

i2s_rx_stop()

i2s_hal_rx_disable_dma(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:471

i2s_rx_stop()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:481

i2s_start()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:485

i2s_start()

esp_intr_enable(p_i2s[i2s_num]->i2s_isr_handle);

i2s_legacy.c:490

i2s_start()

esp_intr_disable(p_i2s[i2s_num]->i2s_isr_handle);

i2s_legacy.c:501

i2s_stop()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:503

i2s_stop()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:506

i2s_stop()

i2s_hal_clear_intr_status(&(p_i2s[i2s_num]->hal), I2S_INTR_MAX);

i2s_legacy.c:510

i2s_stop()

i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg;

i2s_legacy.c:521

i2s_get_buf_size()

uint32_t bytes_per_frame = bytes_per_sample * p_i2s[i2s_num]->active_slot;

i2s_legacy.c:525

i2s_get_buf_size()

p_i2s[i2s_num]->dma_frame_num = (p_i2s[i2s_num]->dma_frame_num * bytes_per_frame > I2S_DMA_BUFFER_MAX_SIZE) ?

i2s_legacy.c:526

i2s_get_buf_size()

I2S_DMA_BUFFER_MAX_SIZE / bytes_per_frame : p_i2s[i2s_num]->dma_frame_num;

i2s_legacy.c:527

i2s_get_buf_size()

uint32_t bufsize = p_i2s[i2s_num]->dma_frame_num * bytes_per_frame;

i2s_legacy.c:528

i2s_get_buf_size()

uint32_t buf_cnt = p_i2s[i2s_num]->dma_desc_num;

i2s_legacy.c:562

i2s_delete_dma_buffer()

uint32_t buf_cnt = p_i2s[i2s_num]->dma_desc_num;

i2s_legacy.c:582

i2s_alloc_dma_buffer()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:612

i2s_alloc_dma_buffer()

i2s_ll_rx_set_eof_num(p_i2s[i2s_num]->hal.dev, dma_obj->buf_size);

i2s_legacy.c:613

i2s_alloc_dma_buffer()

ESP_RETURN_ON_FALSE(p_i2s[i2s_num], ESP_ERR_INVALID_ARG, TAG, "I2S not initialized yet");

i2s_legacy.c:638

i2s_destroy_dma_object()

uint32_t buf_cnt = p_i2s[i2s_num]->dma_desc_num;

i2s_legacy.c:669

i2s_create_dma_object()

i2s_clk_config_t *clk_cfg = &p_i2s[i2s_num]->clk_cfg;

i2s_legacy.c:746

i2s_calculate_adc_dac_clock()

i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg;

i2s_legacy.c:747

i2s_calculate_adc_dac_clock()

clk_info->mclk = (p_i2s[i2s_num]->use_apll && p_i2s[i2s_num]->fixed_mclk) ?

i2s_legacy.c:754

i2s_calculate_adc_dac_clock()

p_i2s[i2s_num]->fixed_mclk : clk_info->bclk * clk_info->bclk_div;

i2s_legacy.c:755

i2s_calculate_adc_dac_clock()

clk_info->sclk = i2s_config_source_clock(i2s_num, p_i2s[i2s_num]->use_apll, clk_info->mclk);

i2s_legacy.c:759

i2s_calculate_adc_dac_clock()

i2s_clk_config_t *clk_cfg = &p_i2s[i2s_num]->clk_cfg;

i2s_legacy.c:774

i2s_calculate_pdm_tx_clock()

clk_info->mclk = (p_i2s[i2s_num]->use_apll && p_i2s[i2s_num]->fixed_mclk) ?

i2s_legacy.c:783

i2s_calculate_pdm_tx_clock()

p_i2s[i2s_num]->fixed_mclk : clk_info->bclk * clk_info->bclk_div;

i2s_legacy.c:784

i2s_calculate_pdm_tx_clock()

clk_info->sclk = i2s_config_source_clock(i2s_num, p_i2s[i2s_num]->use_apll, clk_info->mclk);

i2s_legacy.c:788

i2s_calculate_pdm_tx_clock()

i2s_clk_config_t *clk_cfg = &p_i2s[i2s_num]->clk_cfg;

i2s_legacy.c:803

i2s_calculate_pdm_rx_clock()

clk_info->mclk = (p_i2s[i2s_num]->use_apll && p_i2s[i2s_num]->fixed_mclk) ?

i2s_legacy.c:810

i2s_calculate_pdm_rx_clock()

p_i2s[i2s_num]->fixed_mclk : clk_info->bclk * clk_info->bclk_div;

i2s_legacy.c:811

i2s_calculate_pdm_rx_clock()

clk_info->sclk = i2s_config_source_clock(i2s_num, p_i2s[i2s_num]->use_apll, clk_info->mclk);

i2s_legacy.c:815

i2s_calculate_pdm_rx_clock()

i2s_clk_config_t *clk_cfg = &p_i2s[i2s_num]->clk_cfg;

i2s_legacy.c:828

i2s_calculate_common_clock()

i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg;

i2s_legacy.c:829

i2s_calculate_common_clock()

uint32_t slot_num = p_i2s[i2s_num]->total_slot < 2 ? 2 : p_i2s[i2s_num]->total_slot;

i2s_legacy.c:831

i2s_calculate_common_clock()

if (p_i2s[i2s_num]->role == I2S_ROLE_MASTER) {

i2s_legacy.c:834

i2s_calculate_common_clock()

clk_info->sclk = i2s_config_source_clock(i2s_num, p_i2s[i2s_num]->use_apll, clk_info->mclk);

i2s_legacy.c:845

i2s_calculate_common_clock()

if ((int)p_i2s[i2s_num]->mode == I2S_COMM_MODE_ADC_DAC) {

i2s_legacy.c:859

i2s_calculate_clock()

if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_PDM) {

i2s_legacy.c:867

i2s_calculate_clock()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:869

i2s_calculate_clock()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:874

i2s_calculate_clock()

i2s_dev_t *dev = p_i2s[0]->hal.dev;

i2s_legacy.c:895

i2s_dac_set_slot_legacy()

i2s_hal_slot_config_t *slot_cfg = &p_i2s[0]->slot_cfg;

i2s_legacy.c:896

i2s_dac_set_slot_legacy()

i2s_dev_t *dev = p_i2s[0]->hal.dev;

i2s_legacy.c:936

i2s_adc_set_slot_legacy()

i2s_hal_slot_config_t *slot_cfg = &p_i2s[0]->slot_cfg;

i2s_legacy.c:937

i2s_adc_set_slot_legacy()

ESP_RETURN_ON_FALSE((p_i2s[i2s_num] != NULL), ESP_ERR_INVALID_STATE, TAG, "Not initialized yet");

i2s_legacy.c:972

i2s_adc_enable()

ESP_RETURN_ON_FALSE(((int)p_i2s[i2s_num]->mode == I2S_COMM_MODE_ADC_DAC) && (p_i2s[i2s_num]->dir & I2S_DIR_RX),

i2s_legacy.c:973

i2s_adc_enable()

ESP_RETURN_ON_FALSE((p_i2s[i2s_num] != NULL), ESP_ERR_INVALID_STATE, TAG, "Not initialized yet");

i2s_legacy.c:985

i2s_adc_disable()

ESP_RETURN_ON_FALSE(((int)p_i2s[i2s_num]->mode == I2S_COMM_MODE_ADC_DAC) && (p_i2s[i2s_num]->dir & I2S_DIR_RX),

i2s_legacy.c:986

i2s_adc_disable()

i2s_hal_rx_stop(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:989

i2s_adc_disable()

ESP_RETURN_ON_FALSE(p_i2s[i2s_num] == NULL, ESP_ERR_INVALID_STATE, TAG, "this i2s port is in use");

i2s_legacy.c:1000

i2s_check_cfg_validity()

bool is_tx_slave = p_i2s[i2s_num]->role == I2S_ROLE_SLAVE;

i2s_legacy.c:1038

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->dir == (I2S_DIR_TX | I2S_DIR_RX)) {

i2s_legacy.c:1040

i2s_set_slot_legacy()

i2s_ll_share_bck_ws(p_i2s[i2s_num]->hal.dev, true);

i2s_legacy.c:1041

i2s_set_slot_legacy()

i2s_ll_share_bck_ws(p_i2s[i2s_num]->hal.dev, false);

i2s_legacy.c:1046

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_STD) {

i2s_legacy.c:1048

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1049

i2s_set_slot_legacy()

i2s_hal_std_set_tx_slot(&(p_i2s[i2s_num]->hal), is_tx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg));

i2s_legacy.c:1050

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1052

i2s_set_slot_legacy()

i2s_hal_std_set_rx_slot(&(p_i2s[i2s_num]->hal), is_rx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg));

i2s_legacy.c:1053

i2s_set_slot_legacy()

else if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_PDM) {

i2s_legacy.c:1057

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1059

i2s_set_slot_legacy()

i2s_hal_pdm_set_tx_slot(&(p_i2s[i2s_num]->hal), is_tx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg));

i2s_legacy.c:1060

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1064

i2s_set_slot_legacy()

i2s_hal_pdm_set_rx_slot(&(p_i2s[i2s_num]->hal), is_rx_slave, (i2s_hal_slot_config_t *)(&p_i2s[i2s_num]->slot_cfg));

i2s_legacy.c:1065

i2s_set_slot_legacy()

else if ((int)p_i2s[i2s_num]->mode == I2S_COMM_MODE_ADC_DAC) {

i2s_legacy.c:1081

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1082

i2s_set_slot_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1085

i2s_set_slot_legacy()

i2s_clk_config_t *clk_cfg = &p_i2s[i2s_num]->clk_cfg;

i2s_legacy.c:1094

i2s_set_clock_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1098

i2s_set_clock_legacy()

i2s_hal_set_tx_clock(&(p_i2s[i2s_num]->hal), &clk_info, clk_cfg->clk_src);

i2s_legacy.c:1099

i2s_set_clock_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1101

i2s_set_clock_legacy()

i2s_hal_set_rx_clock(&(p_i2s[i2s_num]->hal), &clk_info, clk_cfg->clk_src);

i2s_legacy.c:1102

i2s_set_clock_legacy()

i2s_clk_config_t *clk_cfg = &p_i2s[i2s_num]->clk_cfg;

i2s_legacy.c:1110

i2s_get_clk()

ESP_RETURN_ON_FALSE(p_i2s[i2s_num], ESP_ERR_INVALID_ARG, TAG, "I2S%d has not installed yet", i2s_num);

i2s_legacy.c:1117

i2s_set_clk()

if (p_i2s[i2s_num]->dir & I2S_MODE_TX) {

i2s_legacy.c:1120

i2s_set_clk()

xSemaphoreTake(p_i2s[i2s_num]->tx->mux, portMAX_DELAY);

i2s_legacy.c:1121

i2s_set_clk()

if (p_i2s[i2s_num]->dir & I2S_MODE_RX) {

i2s_legacy.c:1123

i2s_set_clk()

xSemaphoreTake(p_i2s[i2s_num]->rx->mux, portMAX_DELAY);

i2s_legacy.c:1124

i2s_set_clk()

i2s_clk_config_t *clk_cfg = &p_i2s[i2s_num]->clk_cfg;

i2s_legacy.c:1130

i2s_set_clk()

i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg;

i2s_legacy.c:1131

i2s_set_clk()

if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_STD) {

i2s_legacy.c:1141

i2s_set_clk()

p_i2s[i2s_num]->active_slot = (slot_cfg->slot_mode == I2S_SLOT_MODE_MONO) ? 1 : 2;

i2s_legacy.c:1166

i2s_set_clk()

bool need_realloc = buf_size != p_i2s[i2s_num]->last_buf_size;

i2s_legacy.c:1173

i2s_set_clk()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1177

i2s_set_clk()

p_i2s[i2s_num]->tx->buf_size = buf_size;

i2s_legacy.c:1178

i2s_set_clk()

ret = i2s_realloc_dma_buffer(i2s_num, p_i2s[i2s_num]->tx);

i2s_legacy.c:1179

i2s_set_clk()

xQueueReset(p_i2s[i2s_num]->tx->queue);

i2s_legacy.c:1180

i2s_set_clk()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1183

i2s_set_clk()

p_i2s[i2s_num]->rx->buf_size = buf_size;

i2s_legacy.c:1184

i2s_set_clk()

ret = i2s_realloc_dma_buffer(i2s_num, p_i2s[i2s_num]->rx);

i2s_legacy.c:1185

i2s_set_clk()

xQueueReset(p_i2s[i2s_num]->rx->queue);

i2s_legacy.c:1186

i2s_set_clk()

p_i2s[i2s_num]->last_buf_size = buf_size;

i2s_legacy.c:1191

i2s_set_clk()

if (p_i2s[i2s_num]->dir & I2S_MODE_TX) {

i2s_legacy.c:1196

i2s_set_clk()

xSemaphoreGive(p_i2s[i2s_num]->tx->mux);

i2s_legacy.c:1197

i2s_set_clk()

if (p_i2s[i2s_num]->dir & I2S_MODE_RX) {

i2s_legacy.c:1199

i2s_set_clk()

xSemaphoreGive(p_i2s[i2s_num]->rx->mux);

i2s_legacy.c:1200

i2s_set_clk()

i2s_hal_slot_config_t *slot_cfg = &p_i2s[i2s_num]->slot_cfg;

i2s_legacy.c:1209

i2s_set_sample_rates()

ESP_RETURN_ON_FALSE(p_i2s[i2s_num], ESP_FAIL, TAG, "i2s has not installed yet");

i2s_legacy.c:1257

i2s_set_pdm_rx_down_sample()

ESP_RETURN_ON_FALSE((p_i2s[i2s_num]->mode == I2S_COMM_MODE_PDM), ESP_ERR_INVALID_ARG, TAG, "i2s mode is not PDM mode");

i2s_legacy.c:1258

i2s_set_pdm_rx_down_sample()

xSemaphoreTake(p_i2s[i2s_num]->rx->mux, portMAX_DELAY);

i2s_legacy.c:1259

i2s_set_pdm_rx_down_sample()

p_i2s[i2s_num]->clk_cfg.dn_sample_mode = downsample;

i2s_legacy.c:1261

i2s_set_pdm_rx_down_sample()

i2s_ll_rx_set_pdm_dsr(p_i2s[i2s_num]->hal.dev, downsample);

i2s_legacy.c:1262

i2s_set_pdm_rx_down_sample()

xSemaphoreGive(p_i2s[i2s_num]->rx->mux);

i2s_legacy.c:1264

i2s_set_pdm_rx_down_sample()

return i2s_set_clk(i2s_num, p_i2s[i2s_num]->clk_cfg.sample_rate_hz, p_i2s[i2s_num]->slot_cfg.data_bit_width, p_i2s[i2s_num]->slot_cfg.slot_mode);

i2s_legacy.c:1265

i2s_set_pdm_rx_down_sample()

ESP_RETURN_ON_FALSE(p_i2s[i2s_num], ESP_FAIL, TAG, "i2s has not installed yet");

i2s_legacy.c:1272

i2s_set_pdm_tx_up_sample()

ESP_RETURN_ON_FALSE((p_i2s[i2s_num]->mode == I2S_COMM_MODE_PDM) && (p_i2s[i2s_num]->dir & I2S_DIR_TX),

i2s_legacy.c:1273

i2s_set_pdm_tx_up_sample()

xSemaphoreTake(p_i2s[i2s_num]->tx->mux, portMAX_DELAY);

i2s_legacy.c:1275

i2s_set_pdm_tx_up_sample()

p_i2s[i2s_num]->clk_cfg.up_sample_fp = upsample_cfg->fp;

i2s_legacy.c:1277

i2s_set_pdm_tx_up_sample()

p_i2s[i2s_num]->clk_cfg.up_sample_fs = upsample_cfg->fs;

i2s_legacy.c:1278

i2s_set_pdm_tx_up_sample()

i2s_ll_tx_set_pdm_fpfs(p_i2s[i2s_num]->hal.dev, upsample_cfg->fp, upsample_cfg->fs);

i2s_legacy.c:1279

i2s_set_pdm_tx_up_sample()

i2s_ll_tx_set_pdm_over_sample_ratio(p_i2s[i2s_num]->hal.dev, upsample_cfg->fp / upsample_cfg->fs);

i2s_legacy.c:1280

i2s_set_pdm_tx_up_sample()

xSemaphoreGive(p_i2s[i2s_num]->tx->mux);

i2s_legacy.c:1282

i2s_set_pdm_tx_up_sample()

return i2s_set_clk(i2s_num, p_i2s[i2s_num]->clk_cfg.sample_rate_hz, p_i2s[i2s_num]->slot_cfg.data_bit_width, p_i2s[i2s_num]->slot_cfg.slot_mode);

i2s_legacy.c:1283

i2s_set_pdm_tx_up_sample()

p_i2s[i2s_num]->last_buf_size = buf_size;

i2s_legacy.c:1290

i2s_dma_object_init()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1292

i2s_dma_object_init()

ESP_RETURN_ON_ERROR(i2s_create_dma_object(i2s_num, &p_i2s[i2s_num]->tx), TAG, "I2S TX DMA object create failed");

i2s_legacy.c:1293

i2s_dma_object_init()

p_i2s[i2s_num]->tx->buf_size = buf_size;

i2s_legacy.c:1294

i2s_dma_object_init()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1296

i2s_dma_object_init()

ESP_RETURN_ON_ERROR(i2s_create_dma_object(i2s_num, &p_i2s[i2s_num]->rx), TAG, "I2S RX DMA object create failed");

i2s_legacy.c:1297

i2s_dma_object_init()

p_i2s[i2s_num]->rx->buf_size = buf_size;

i2s_legacy.c:1298

i2s_dma_object_init()

p_i2s[i2s_num]->mode = I2S_COMM_MODE_STD;

i2s_legacy.c:1306

i2s_mode_identify()

p_i2s[i2s_num]->role = I2S_ROLE_MASTER;

i2s_legacy.c:1309

i2s_mode_identify()

p_i2s[i2s_num]->role = I2S_ROLE_SLAVE;

i2s_legacy.c:1311

i2s_mode_identify()

p_i2s[i2s_num]->dir |= I2S_DIR_TX;

i2s_legacy.c:1314

i2s_mode_identify()

p_i2s[i2s_num]->dir |= I2S_DIR_RX;

i2s_legacy.c:1317

i2s_mode_identify()

p_i2s[i2s_num]->mode = I2S_COMM_MODE_PDM;

i2s_legacy.c:1321

i2s_mode_identify()

p_i2s[i2s_num]->mode = (i2s_comm_mode_t)I2S_COMM_MODE_ADC_DAC;

i2s_legacy.c:1334

i2s_mode_identify()

p_i2s[i2s_num]->slot_cfg.data_bit_width = i2s_config->bits_per_sample;

i2s_legacy.c:1344

i2s_config_transfer()

p_i2s[i2s_num]->slot_cfg.slot_bit_width = (int)i2s_config->bits_per_chan < (int)i2s_config->bits_per_sample ?

i2s_legacy.c:1345

i2s_config_transfer()

p_i2s[i2s_num]->slot_cfg.slot_mode = i2s_config->channel_format < I2S_CHANNEL_FMT_ONLY_RIGHT ?

i2s_legacy.c:1348

i2s_config_transfer()

CLK_CFG().sample_rate_hz = i2s_config->sample_rate;

i2s_legacy.c:1350

i2s_config_transfer()

CLK_CFG().mclk_multiple = i2s_config->mclk_multiple == 0 ? I2S_MCLK_MULTIPLE_256 : i2s_config->mclk_multiple;

i2s_legacy.c:1351

i2s_config_transfer()

CLK_CFG().clk_src = I2S_CLK_SRC_DEFAULT;

i2s_legacy.c:1352

i2s_config_transfer()

p_i2s[i2s_num]->fixed_mclk = i2s_config->fixed_mclk;

i2s_legacy.c:1353

i2s_config_transfer()

p_i2s[i2s_num]->use_apll = false;

i2s_legacy.c:1354

i2s_config_transfer()

CLK_CFG().clk_src = i2s_config->use_apll ? I2S_CLK_SRC_APLL : I2S_CLK_SRC_DEFAULT;

i2s_legacy.c:1356

i2s_config_transfer()

p_i2s[i2s_num]->use_apll = i2s_config->use_apll;

i2s_legacy.c:1357

i2s_config_transfer()

if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_STD) {

i2s_legacy.c:1361

i2s_config_transfer()

SLOT_CFG(std).ws_width = i2s_config->bits_per_sample;

i2s_legacy.c:1363

i2s_config_transfer()

SLOT_CFG(std).ws_pol = false;

i2s_legacy.c:1364

i2s_config_transfer()

SLOT_CFG(std).slot_mask = I2S_STD_SLOT_BOTH;

i2s_legacy.c:1366

i2s_config_transfer()

SLOT_CFG(std).slot_mask = I2S_STD_SLOT_LEFT;

i2s_legacy.c:1369

i2s_config_transfer()

SLOT_CFG(std).slot_mask = I2S_STD_SLOT_RIGHT;

i2s_legacy.c:1371

i2s_config_transfer()

SLOT_CFG(std).bit_shift = true;

i2s_legacy.c:1374

i2s_config_transfer()

SLOT_CFG(std).bit_shift = true;

i2s_legacy.c:1377

i2s_config_transfer()

SLOT_CFG(std).ws_width = 1;

i2s_legacy.c:1378

i2s_config_transfer()

SLOT_CFG(std).ws_pol = true;

i2s_legacy.c:1379

i2s_config_transfer()

SLOT_CFG(std).msb_right = true;

i2s_legacy.c:1382

i2s_config_transfer()

p_i2s[i2s_num]->active_slot = (int)p_i2s[i2s_num]->slot_cfg.slot_mode == I2S_SLOT_MODE_MONO ? 1 : 2;

i2s_legacy.c:1389

i2s_config_transfer()

p_i2s[i2s_num]->total_slot = 2;

i2s_legacy.c:1390

i2s_config_transfer()

if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_PDM) {

i2s_legacy.c:1394

i2s_config_transfer()

SLOT_CFG(pdm_tx).sd_prescale = 0;

i2s_legacy.c:1396

i2s_config_transfer()

SLOT_CFG(pdm_tx).sd_scale = I2S_PDM_SIG_SCALING_MUL_1;

i2s_legacy.c:1397

i2s_config_transfer()

SLOT_CFG(pdm_tx).hp_scale = I2S_PDM_SIG_SCALING_MUL_1;

i2s_legacy.c:1398

i2s_config_transfer()

SLOT_CFG(pdm_tx).lp_scale = I2S_PDM_SIG_SCALING_MUL_1;

i2s_legacy.c:1399

i2s_config_transfer()

SLOT_CFG(pdm_tx).sinc_scale = I2S_PDM_SIG_SCALING_MUL_1;

i2s_legacy.c:1400

i2s_config_transfer()

CLK_CFG().up_sample_fp = 960;

i2s_legacy.c:1410

i2s_config_transfer()

CLK_CFG().up_sample_fs = i2s_config->sample_rate / 100;

i2s_legacy.c:1411

i2s_config_transfer()

p_i2s[i2s_num]->active_slot = (int)p_i2s[i2s_num]->slot_cfg.slot_mode == I2S_SLOT_MODE_MONO ? 1 : 2;

i2s_legacy.c:1412

i2s_config_transfer()

p_i2s[i2s_num]->total_slot = 2;

i2s_legacy.c:1413

i2s_config_transfer()

if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_PDM) {

i2s_legacy.c:1419

i2s_config_transfer()

CLK_CFG().dn_sample_mode = I2S_PDM_DSR_8S;

i2s_legacy.c:1421

i2s_config_transfer()

p_i2s[i2s_num]->active_slot = (int)p_i2s[i2s_num]->slot_cfg.slot_mode == I2S_SLOT_MODE_MONO ? 1 : 2;

i2s_legacy.c:1422

i2s_config_transfer()

p_i2s[i2s_num]->total_slot = 2;

i2s_legacy.c:1423

i2s_config_transfer()

if ((int)p_i2s[i2s_num]->mode == I2S_COMM_MODE_ADC_DAC) {

i2s_legacy.c:1462

i2s_config_transfer()

p_i2s[i2s_num]->slot_cfg.slot_mode = (p_i2s[i2s_num]->dir & I2S_DIR_TX) ?

i2s_legacy.c:1463

i2s_config_transfer()

p_i2s[i2s_num]->active_slot = (p_i2s[i2s_num]->dir & I2S_DIR_TX) ? 2 : 1;

i2s_legacy.c:1465

i2s_config_transfer()

p_i2s[i2s_num]->total_slot = 2;

i2s_legacy.c:1466

i2s_config_transfer()

ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock, 0, "i2s_driver", &p_i2s[i2s_num]->pm_lock), TAG, "I2S pm lock error");

i2s_legacy.c:1482

i2s_init_legacy()

if (p_i2s[i2s_num]->use_apll) {

i2s_legacy.c:1486

i2s_init_legacy()

if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_STD) {

i2s_legacy.c:1492

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1493

i2s_init_legacy()

i2s_hal_std_enable_tx_channel(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:1494

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1496

i2s_init_legacy()

i2s_hal_std_enable_rx_channel(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:1497

i2s_init_legacy()

else if (p_i2s[i2s_num]->mode == I2S_COMM_MODE_PDM) {

i2s_legacy.c:1501

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1503

i2s_init_legacy()

i2s_hal_pdm_enable_tx_channel(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:1504

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1508

i2s_init_legacy()

i2s_hal_pdm_enable_rx_channel(&(p_i2s[i2s_num]->hal));

i2s_legacy.c:1509

i2s_init_legacy()

if ((int)p_i2s[i2s_num]->mode == I2S_COMM_MODE_ADC_DAC) {

i2s_legacy.c:1525

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1526

i2s_init_legacy()

i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, true);

i2s_legacy.c:1529

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1531

i2s_init_legacy()

i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, true);

i2s_legacy.c:1532

i2s_init_legacy()

i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, false);

i2s_legacy.c:1536

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1544

i2s_init_legacy()

ESP_RETURN_ON_ERROR(i2s_realloc_dma_buffer(i2s_num, p_i2s[i2s_num]->tx), TAG, "Allocate I2S dma tx buffer failed");

i2s_legacy.c:1545

i2s_init_legacy()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1547

i2s_init_legacy()

ESP_RETURN_ON_ERROR(i2s_realloc_dma_buffer(i2s_num, p_i2s[i2s_num]->rx), TAG, "Allocate I2S dma rx buffer failed");

i2s_legacy.c:1548

i2s_init_legacy()

ESP_RETURN_ON_FALSE(p_i2s[i2s_num], ESP_ERR_INVALID_STATE, TAG, "I2S port %d has not installed", i2s_num);

i2s_legacy.c:1557

i2s_driver_uninstall()

i2s_obj_t *obj = p_i2s[i2s_num];

i2s_legacy.c:1558

i2s_driver_uninstall()

p_i2s[i2s_num] = NULL;

i2s_legacy.c:1637

i2s_driver_uninstall()

p_i2s[i2s_num] = i2s_obj;

i2s_legacy.c:1659

i2s_driver_install()

ESP_RETURN_ON_FALSE((p_i2s[i2s_num]->tx), ESP_ERR_INVALID_ARG, TAG, "TX mode is not enabled");

i2s_legacy.c:1700

i2s_write()

xSemaphoreTake(p_i2s[i2s_num]->tx->mux, portMAX_DELAY);

i2s_legacy.c:1701

i2s_write()

esp_pm_lock_acquire(p_i2s[i2s_num]->pm_lock);

i2s_legacy.c:1703

i2s_write()

if (p_i2s[i2s_num]->tx->rw_pos == p_i2s[i2s_num]->tx->buf_size || p_i2s[i2s_num]->tx->curr_ptr == NULL) {

i2s_legacy.c:1707

i2s_write()

if (xQueueReceive(p_i2s[i2s_num]->tx->queue, &p_i2s[i2s_num]->tx->curr_ptr, ticks_to_wait) == pdFALSE) {

i2s_legacy.c:1708

i2s_write()

p_i2s[i2s_num]->tx->rw_pos = 0;

i2s_legacy.c:1711

i2s_write()

ESP_LOGD(TAG, "size: %d, rw_pos: %d, buf_size: %d, curr_ptr: %p", size, p_i2s[i2s_num]->tx->rw_pos, p_i2s[i2s_num]->tx->buf_size, p_i2s[i2s_num]->tx->curr_ptr);

i2s_legacy.c:1713

i2s_write()

data_ptr = (char *)p_i2s[i2s_num]->tx->curr_ptr;

i2s_legacy.c:1714

i2s_write()

data_ptr += p_i2s[i2s_num]->tx->rw_pos;

i2s_legacy.c:1715

i2s_write()

bytes_can_write = p_i2s[i2s_num]->tx->buf_size - p_i2s[i2s_num]->tx->rw_pos;

i2s_legacy.c:1716

i2s_write()

p_i2s[i2s_num]->tx->rw_pos += bytes_can_write;

i2s_legacy.c:1726

i2s_write()

esp_pm_lock_release(p_i2s[i2s_num]->pm_lock);

i2s_legacy.c:1730

i2s_write()

xSemaphoreGive(p_i2s[i2s_num]->tx->mux);

i2s_legacy.c:1732

i2s_write()

ESP_RETURN_ON_FALSE((p_i2s[i2s_num]->tx), ESP_ERR_INVALID_ARG, TAG, "TX mode is not enabled");

i2s_legacy.c:1748

i2s_write_expand()

xSemaphoreTake(p_i2s[i2s_num]->tx->mux, portMAX_DELAY);

i2s_legacy.c:1769

i2s_write_expand()

if (p_i2s[i2s_num]->tx->rw_pos == p_i2s[i2s_num]->tx->buf_size || p_i2s[i2s_num]->tx->curr_ptr == NULL) {

i2s_legacy.c:1773

i2s_write_expand()

if (xQueueReceive(p_i2s[i2s_num]->tx->queue, &p_i2s[i2s_num]->tx->curr_ptr, ticks_to_wait) == pdFALSE) {

i2s_legacy.c:1774

i2s_write_expand()

p_i2s[i2s_num]->tx->rw_pos = 0;

i2s_legacy.c:1777

i2s_write_expand()

data_ptr = (char *)p_i2s[i2s_num]->tx->curr_ptr;

i2s_legacy.c:1779

i2s_write_expand()

data_ptr += p_i2s[i2s_num]->tx->rw_pos;

i2s_legacy.c:1780

i2s_write_expand()

bytes_can_write = p_i2s[i2s_num]->tx->buf_size - p_i2s[i2s_num]->tx->rw_pos;

i2s_legacy.c:1781

i2s_write_expand()

p_i2s[i2s_num]->tx->rw_pos += bytes_can_write;

i2s_legacy.c:1798

i2s_write_expand()

xSemaphoreGive(p_i2s[i2s_num]->tx->mux);

i2s_legacy.c:1800

i2s_write_expand()

ESP_RETURN_ON_FALSE((p_i2s[i2s_num]->rx), ESP_ERR_INVALID_ARG, TAG, "RX mode is not enabled");

i2s_legacy.c:1812

i2s_read()

xSemaphoreTake(p_i2s[i2s_num]->rx->mux, portMAX_DELAY);

i2s_legacy.c:1813

i2s_read()

esp_pm_lock_acquire(p_i2s[i2s_num]->pm_lock);

i2s_legacy.c:1815

i2s_read()

if (p_i2s[i2s_num]->rx->rw_pos == p_i2s[i2s_num]->rx->buf_size || p_i2s[i2s_num]->rx->curr_ptr == NULL) {

i2s_legacy.c:1818

i2s_read()

if (xQueueReceive(p_i2s[i2s_num]->rx->queue, &p_i2s[i2s_num]->rx->curr_ptr, ticks_to_wait) == pdFALSE) {

i2s_legacy.c:1819

i2s_read()

p_i2s[i2s_num]->rx->rw_pos = 0;

i2s_legacy.c:1822

i2s_read()

data_ptr = (char *)p_i2s[i2s_num]->rx->curr_ptr;

i2s_legacy.c:1824

i2s_read()

data_ptr += p_i2s[i2s_num]->rx->rw_pos;

i2s_legacy.c:1825

i2s_read()

bytes_can_read = p_i2s[i2s_num]->rx->buf_size - p_i2s[i2s_num]->rx->rw_pos;

i2s_legacy.c:1826

i2s_read()

p_i2s[i2s_num]->rx->rw_pos += bytes_can_read;

i2s_legacy.c:1833

i2s_read()

esp_pm_lock_release(p_i2s[i2s_num]->pm_lock);

i2s_legacy.c:1837

i2s_read()

xSemaphoreGive(p_i2s[i2s_num]->rx->mux);

i2s_legacy.c:1839

i2s_read()

ESP_RETURN_ON_ERROR(esp_clock_output_start(clkout_sig, gpio_num, &p_i2s[i2s_num]->mclk_out_hdl), TAG, "mclk configure failed");

i2s_legacy.c:1873

i2s_check_set_mclk()

uint32_t buf_cnt = p_i2s[i2s_num]->dma_desc_num;

i2s_legacy.c:1885

i2s_zero_dma_buffer()

if (p_i2s[i2s_num]->rx && p_i2s[i2s_num]->rx->buf != NULL && p_i2s[i2s_num]->rx->buf_size != 0) {

i2s_legacy.c:1888

i2s_zero_dma_buffer()

memset(p_i2s[i2s_num]->rx->buf[i], 0, p_i2s[i2s_num]->rx->buf_size);

i2s_legacy.c:1890

i2s_zero_dma_buffer()

if (p_i2s[i2s_num]->tx && p_i2s[i2s_num]->tx->buf != NULL && p_i2s[i2s_num]->tx->buf_size != 0) {

i2s_legacy.c:1895

i2s_zero_dma_buffer()

int bytes_left = (p_i2s[i2s_num]->tx->buf_size - p_i2s[i2s_num]->tx->rw_pos) % 4;

i2s_legacy.c:1897

i2s_zero_dma_buffer()

memset(p_i2s[i2s_num]->tx->buf[i], 0, p_i2s[i2s_num]->tx->buf_size);

i2s_legacy.c:1904

i2s_zero_dma_buffer()

if (p_i2s[i2s_num]->role == I2S_ROLE_SLAVE) {

i2s_legacy.c:1930

i2s_set_pin()

if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {

i2s_legacy.c:1932

i2s_set_pin()

if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {

i2s_legacy.c:1944

i2s_set_pin()

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