mcpwm_timer_sync_reg_t::::timer_synco_sel field

timer_synco_sel : R/W; bitpos: [3:2]; default: 0; PWM timer sync_out selection, 0: sync_in, 1: TEZ, 2: TEP, and sync out will always generate when toggling the reg_timer_sync_sw bit

Syntax

Show:

Summary

Declaration

from mcpwm_struct.h:93

uint32_t timer_synco_sel: 2;

References

Code

Location

Referrer

uint32_t timer_synco_sel: 2;

mcpwm_struct.h:93

mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 0;

mcpwm_ll.h:415

mcpwm_ll_timer_propagate_input_sync()

mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 1;

mcpwm_ll.h:429

mcpwm_ll_timer_sync_out_on_timer_event()

mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 2;

mcpwm_ll.h:432

mcpwm_ll_timer_sync_out_on_timer_event()

mcpwm->timer[timer_id].timer_sync.timer_synco_sel = 3;

mcpwm_ll.h:449

mcpwm_ll_timer_disable_sync_out()

Call Tree

All items filtered out

Data Use

mcpwm_timer_sync_reg_t::::timer_synco_sel is written by 3 functions:

mcpwm_ll_timer_propagate_input_sync()

mcpwm_ll_timer_sync_out_on_timer_event()

mcpwm_ll_timer_disable_sync_out()

mcpwm_timer_sync_reg_t::::timer_synco_sel

Class Tree

All items filtered out

Override Tree

All items filtered out

Implementations

All items filtered out

Instances

Lifecycle

All items filtered out