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SourceVuESP-IDF Framework and ExamplesESP-IDFmcpwm_timer_cfg1_reg_t::::timer_mod

mcpwm_timer_cfg1_reg_t::::timer_mod field

timer_mod : R/W; bitpos: [4:3]; default: 0; PWM timer working mode, 0: freeze, 1: increase mode, 2: decrease mode, 3: up-down mode

Syntax

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Summary

Declaration

from mcpwm_struct.h:70

uint32_t timer_mod: 2;

References

Code

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Referrer

uint32_t timer_mod: 2;

mcpwm_struct.h:70

mcpwm->timer[timer_id].timer_cfg1.timer_mod = 0;

mcpwm_ll_timer_set_count_mode()

mcpwm->timer[timer_id].timer_cfg1.timer_mod = 1;

mcpwm_ll_timer_set_count_mode()

mcpwm->timer[timer_id].timer_cfg1.timer_mod = 2;

mcpwm_ll_timer_set_count_mode()

mcpwm->timer[timer_id].timer_cfg1.timer_mod = 3;

mcpwm_ll_timer_set_count_mode()

switch (mcpwm->timer[timer_id].timer_cfg1.timer_mod) {

mcpwm_ll.h:1631

mcpwm_ll_timer_get_count_mode()

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Data Use

mcpwm_timer_cfg1_reg_t::::timer_mod is written by 1 function and is read by 1 function:

mcpwm_ll_timer_set_count_mode()

mcpwm_timer_cfg1_reg_t::::timer_mod

mcpwm_ll_timer_get_count_mode()

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