mcpwm_cap_timer_cfg_reg_t::::cap_sync_sw field

cap_sync_sw : WT; bitpos: [5]; default: 0; When reg_cap_synci_en is 1, write 1 will trigger a capture timer sync, capture timer is loaded with value in phase register.

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Declaration

from mcpwm_struct.h:714

uint32_t cap_sync_sw: 1;

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uint32_t cap_sync_sw: 1;

mcpwm_struct.h:714

mcpwm->cap_timer_cfg.cap_sync_sw = 1; // auto clear

mcpwm_ll.h:1522

mcpwm_ll_capture_trigger_sw_sync()

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mcpwm_cap_timer_cfg_reg_t::::cap_sync_sw is written by 1 function:

mcpwm_ll_capture_trigger_sw_sync()

mcpwm_cap_timer_cfg_reg_t::::cap_sync_sw

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