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SourceVuESP-IDF Framework and ExamplesESP-IDF_SPI_CACHE_PORT

_SPI_CACHE_PORT macro

Syntax

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Summary

Declaration

from esp_psram_impl_quad.c:166

#define _SPI_CACHE_PORT 0

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Code

Location

#define _SPI_CACHE_PORT 0

esp_psram_impl_quad.c:166

g_rom_spiflash_dummy_len_plus[_SPI_CACHE_PORT] = PSRAM_IO_MATRIX_DUMMY_80M;

esp_psram_impl_quad.c:754

SET_PERI_REG_BITS(SPI_USER1_REG(_SPI_CACHE_PORT), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + PSRAM_IO_MATRIX_DUMMY_80M, SPI_USR_DUMMY_CYCLELEN_S); //DUMMY

esp_psram_impl_quad.c:756

esp_rom_spiflash_config_clk(_SPI_80M_CLK_DIV, _SPI_CACHE_PORT);

esp_psram_impl_quad.c:757

g_rom_spiflash_dummy_len_plus[_SPI_CACHE_PORT] = PSRAM_IO_MATRIX_DUMMY_80M;

esp_psram_impl_quad.c:765

SET_PERI_REG_BITS(SPI_USER1_REG(_SPI_CACHE_PORT), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + PSRAM_IO_MATRIX_DUMMY_80M, SPI_USR_DUMMY_CYCLELEN_S); //DUMMY

esp_psram_impl_quad.c:767

esp_rom_spiflash_config_clk(_SPI_80M_CLK_DIV, _SPI_CACHE_PORT);

esp_psram_impl_quad.c:768

g_rom_spiflash_dummy_len_plus[_SPI_CACHE_PORT] = PSRAM_IO_MATRIX_DUMMY_40M;

esp_psram_impl_quad.c:776

SET_PERI_REG_BITS(SPI_USER1_REG(_SPI_CACHE_PORT), SPI_USR_DUMMY_CYCLELEN_V, spi_cache_dummy + PSRAM_IO_MATRIX_DUMMY_40M, SPI_USR_DUMMY_CYCLELEN_S); //DUMMY

esp_psram_impl_quad.c:778

esp_rom_spiflash_config_clk(_SPI_40M_CLK_DIV, _SPI_CACHE_PORT);

esp_psram_impl_quad.c:779

psram_set_cs_timing(_SPI_CACHE_PORT, s_clk_mode);

esp_psram_impl_quad.c:1039